| 12111775 |
Memory hub providing cache coherency protocol system method for multiple processor sockets comprising multiple XPUs |
Matthew J. Adiletta, Hugh Wilkinson, Patrick Connor |
2024-10-08 |
| 12099408 |
Memory striping approach that interleaves sub protected data words |
Matthew J. Adiletta |
2024-09-24 |
| 11699471 |
Synchronous dynamic random access memory (SDRAM) dual in-line memory module (DIMM) having increased per data pin bandwidth |
Bill Nale |
2023-07-11 |
| 10884968 |
Technologies for flexible protocol acceleration |
Matthew J. Adiletta, Bradley A. Burres, Amit Kumar, Yadong Li, Salma Mirza +3 more |
2021-01-05 |
| 10783100 |
Technologies for flexible I/O endpoint acceleration |
Matthew J. Adiletta, Brad Burres, Amit Kumar, Yadong Li, Salma Mirza +3 more |
2020-09-22 |
| 8331133 |
Apparatuses for register file with novel bit cell implementation |
— |
2012-12-11 |
| 7533286 |
Regulating application of clock to control current rush (DI/DT) |
Praveen Mosur, Benjamin J. Cahill |
2009-05-12 |
| 7447948 |
ECC coding for high speed implementation |
Ranjit Loboprabhu, Jose Niell |
2008-11-04 |
| 7099328 |
Method for automatic resource reservation and communication that facilitates using multiple processing events for a single processing task |
Joseph B. Tompkins, Bruce Burns, Daniel J. Lussier |
2006-08-29 |
| 6822959 |
Enhancing performance by pre-fetching and caching data directly in a communication processor's register set |
Wilson P. Snyder, II, Daniel J. Lussier |
2004-11-23 |
| 6760478 |
Method and apparatus for performing two pass quality video compression through pipelining and buffer management |
Matthew J. Adiletta, King-Wai Chow, Samuel Ho, Robert C. Rose, William R. Wheeler |
2004-07-06 |
| 6366502 |
Circuitry for reading from and writing to memory cells |
Steven Charles Docker |
2002-04-02 |
| 6101276 |
Method and apparatus for performing two pass quality video compression through pipelining and buffer management |
Matthew J. Adiletta, King-Wai Chow, Samuel Ho, Robert C. Rose, William R. Wheeler |
2000-08-08 |
| 5847575 |
Method and apparatus for performing switched supply drive in CMOS pad drivers |
Chris Houghton, John A. Kowaleski, Jr. |
1998-12-08 |
| 5638385 |
Fast check bit write for a semiconductor memory |
John A. Fifield, Hsing-San Lee |
1997-06-10 |
| 5547894 |
CMOS processing with low and high-current FETs |
Jack A. Mandelman, James A. Slinkman, William R. Tonti |
1996-08-20 |
| 5532969 |
Clocking circuit with increasing delay as supply voltage VDD |
Russell J. Houghton |
1996-07-02 |
| 5440258 |
Off-chip driver with voltage regulated predrive |
Russell J. Houghton, Michael Killian, Adam Wilson |
1995-08-08 |
| 5420456 |
ZAG fuse for reduced blow-current application |
William H. Guthrie, Oliver Kiehl, Jack A. Mandelman, Josef S. Watts |
1995-05-30 |
| 5418738 |
Low voltage programmable storage element |
Wagdi W. Abadeer, Badih El-Kareh, Wayne F. Ellis, Nathan R. Hiltebeitel, William R. Tonti +1 more |
1995-05-23 |
| 5412613 |
Memory device having asymmetrical CAS to data input/output mapping and applications thereof |
Michael Patrick Clinton, Mark W. Kellogg |
1995-05-02 |
| 5334880 |
Low voltage programmable storage element |
Wagdi W. Abadeer, Badih El-Kareh, Wayne F. Ellis, Nathan R. Hiltebeitel, William R. Tonti +1 more |
1994-08-02 |
| 5255224 |
Boosted drive system for master/local word line memory architecture |
Russell J. Houghton, Richard Michael Parent |
1993-10-19 |
| 5221864 |
Stable voltage reference circuit with high Vt devices |
Russell J. Houghton |
1993-06-22 |
