Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Bradley A. Burres — 28 Patents

Intel: 25 patents #1,588 of 30,777Top 6%
SSSk Hynix Nand Product Solutions: 3 patents #16 of 148Top 15%
Waltham, MA: #58 of 1,656 inventorsTop 4%
Massachusetts: #3,526 of 88,656 inventorsTop 4%
Overall (All Time): #134,628 of 4,157,543Top 4%
28 Patents All Time
Bradley A. Burres has been granted 28 US patents while listed as an inventor at Intel. The first was granted in 2006 and the most recent in November 2025. Bradley A. Burres ranks #134,628 of 4,157,543 US inventors in our database (top 3.2%). Patent records list Bradley A. Burres in Waltham, MA, US.

Patents per Year

Patents granted per year, 2006 to 2024Bar chart with a peak of 4 patents in 2024.peak 42006: 1 patents20062008: 1 patents2009: 3 patents20092010: 1 patents2011: 2 patents20112012: 1 patents2013: 2 patents20132014: 1 patents2015: 1 patents20152016: 2 patents2018: 1 patents20182019: 1 patents2020: 1 patents20202021: 3 patents2023: 2 patents20232024: 4 patents2024

Issued Patents All Time

Showing 1–25 of 28 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12461793 Initiator-side offload for scale-out storage Samira Johnson, Jose Niell, Yadong Li, Scott R. Peterson, Tony Hurson +1 more 2025-11-04
12124619 VM encryption of block storage with end-to-end data integrity protection in a SmartNIC Jose Niell, Kiel Boyle 2024-10-22 $18,859,000
12079149 Presentation of direct accessed storage under a logical drive model Thomas M. Slaight, Sivakumar Radhakrishnan, Mark A. Schmisseur, Pankaj Kumar, Saptarshi Mondal +9 more 2024-09-03
12079153 Dynamic configuration of input/output controller access lanes Balaji Parthasarathy, Ramamurthy Krithivas, Pawel Szymanski, Yi-Feng Liu 2024-09-03 $14,017,000
11941458 Maintaining storage namespace identifiers for live virtualized execution environment migration Jose Niell, Kiel Boyle, David Noeldner, Keith Shaw, Karl Brummel 2024-03-26
11693807 Dynamic configuration of input/output controller access lanes Balaji Parthasarathy, Ramamurthy Krithivas, Pawel Szymanski, Yi-Feng Liu 2023-07-04
11604746 Presentation of direct accessed storage under a logical drive model Thomas M. Slaight, Sivakumar Radhakrishnan, Mark A. Schmisseur, Pankaj Kumar, Saptarshi Mondal +9 more 2023-03-14
10956351 Dynamic configuration of input/output controller access lanes Balaji Parthasarathy, Ramamurthy Krithivas, Pawel Szymanski, Yi-Feng Liu 2021-03-23 $29,278,000
10929323 Multi-core communication acceleration using hardware queue device Ren Wang, Yipeng Wang, Andrew J. Herdrich, Jr-Shian Tsai, Tsung-Yuan C. Tai +20 more 2021-02-23 $31,062,000
10884968 Technologies for flexible protocol acceleration Matthew J. Adiletta, Duane E. Galbi, Amit Kumar, Yadong Li, Salma Mirza +3 more 2021-01-05 $27,050,000
10628615 Asset protection of integrated circuits during transport Ramamurthy Krithivas, Donald Soltis 2020-04-21 $45,742,000
10445271 Multi-core communication acceleration using hardware queue device Ren Wang, Namakkal N. Venkatesan, Debra Bernstein, Edwin Verplanke, Stephen R. Van Doren +20 more 2019-10-15 $18,012,000
9996711 Asset protection of integrated circuits during transport Ramamurthy Krithivas, Donald Soltis 2018-06-12 $21,622,000
9417821 Presentation of direct accessed storage under a logical drive model Thomas M. Slaight, Sivakumar Radhakrishnan, Mark A. Schmisseur, Pankaj Kumar, Saptarshi Mondal +9 more 2016-08-16 $10,311,000
9244877 Link layer virtualization in SATA controller Chengda Yang, Amit Kumar, Matthew J. Adiletta 2016-01-26 $9,792,000
9047082 Instruction-set architecture for programmable Cyclic Redundancy Check (CRC) computations Vinodh Gopal, Shay Gueron, Gilbert M. Wolrich, Wajdi K. Feghali, Kirk S. Yap 2015-06-02 $17,367,000
8732548 Instruction-set architecture for programmable cyclic redundancy check (CRC) computations Vinodh Gopal, Shay Gueron, Gilbert M. Wolrich, Wajdi K. Feghali, Kirk S. Yap 2014-05-20 $20,841,000
8464125 Instruction-set architecture for programmable cyclic redundancy check (CRC) computations Vinodh Gopal, Shay Gueron, Gilbert M. Wolrich, Wajdi K. Feghali, Kirk S. Yap 2013-06-11 $12,060,000
8417943 Method and apparatus for performing an authentication after cipher operation in a network processor Jaroslaw J. Sydir, Kamal J. Koshy, Wajdi K. Feghali, Gilbert M. Woolrich 2013-04-09 $21,775,000
8316191 Memory controllers for processor having multiple programmable units William R. Wheeler, Matthew J. Adiletta, Gilbert M. Wolrich 2012-11-20 $10,358,000
8065678 Method and apparatus for scheduling the processing of commands for execution by cryptographic algorithm cores in a programmable network processor Jaroslaw J. Sydir, Chen-Chi Kuo, Kamal J. Koshy, Wajdi K. Feghali, Gilbert M. Wolrich 2011-11-22 $16,463,000
8041945 Method and apparatus for performing an authentication after cipher operation in a network processor Jaroslaw J. Sydir, Kamal J. Koshy, Wajdi K. Feghali, Gilbert M. Wolrich 2011-10-18 $21,649,000
7801299 Techniques for merging tables Gunnar Gaubatz, William C. Hasenplaugh, Wajdi K. Feghali, Kirk S. Yap 2010-09-21 $10,255,000
7543142 Method and apparatus for performing an authentication after cipher operation in a network processor Jaroslaw J. Sydir, Kamal J. Koshy, Wajdi K. Feghali, Gilbert M. Wolrich 2009-06-02 $16,449,000
7529924 Method and apparatus for aligning ciphered data Jaroslaw J. Sydir, Kamal J. Koshy, Wajdi K. Feghali, Gilbert M. Wolrich 2009-05-05 $25,050,000