Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9921989 | Method, apparatus and system for modular on-die coherent interconnect for packetized communication | Krishnakumar Ganapathy, Yen-Cheng Liu, Antonio Juan, Steven R. Page, Jeffrey D. Chamberlain +2 more | 2018-03-20 |
| 9025766 | Efficient hardware architecture for a S1 S-box in a ZUC cipher | Krzysztof Jankowski | 2015-05-05 |
| 8229109 | Modular reduction using folding | William C. Hasenplaugh, Vinodh Gopal | 2012-07-24 |
| 8073892 | Cryptographic system, method and multiplier | Wajdi K. Feghali, William C. Hasenplaugh, Gilbert M. Wolrich, Daniel Cutter, Vinodh Gopal | 2011-12-06 |
| 8020142 | Hardware accelerator | Gilbert M. Wolrich, William C. Hasenplaugh, Wajdi K. Feghali, Daniel Cutter, Vinodh Gopal | 2011-09-13 |
| 7930337 | Multiplying two numbers | William C. Hasenplaugh, Vinodh Gopal, Matthew Bace | 2011-04-19 |
| 7925011 | Method for simultaneous modular exponentiations | Vinodh Gopal, Erdinc Ozturk, Kaan Yuksel, Wajdi K. Feghali, Gilbert M. Wolrich | 2011-04-12 |
| 7827471 | Determining message residue using a set of polynomials | William C. Hasenplaugh, Brad Burres | 2010-11-02 |
| 7801299 | Techniques for merging tables | William C. Hasenplaugh, Bradley A. Burres, Wajdi K. Feghali, Kirk S. Yap | 2010-09-21 |
| 7738657 | System and method for multi-precision division | Vinodh Gopal, Matt Bace, Gilbert M. Wolrich | 2010-06-15 |
| 7725624 | System and method for cryptography processing units and multiplier | Wajdi K. Feghali, William C. Hasenplaugh, Gilbert M. Wolrich, Daniel Cutter, Vinodh Gopal | 2010-05-25 |
| 7475229 | Executing instruction for processing by ALU accessing different scope of variables using scope index automatically changed upon procedure call and exit | Wajdi K. Feghali, William C. Hasenplaugh, Gilbert M. Wolrich, Daniel F. Cutter, Vinodh Gopal | 2009-01-06 |