Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12086653 | Software visible and controllable lock-stepping with configurable logical processor granularities | Vedvyas Shanbhogue, Jeff Huxel, Jeffrey G. Wiedemeier, James D. Allen, IV, Arvind Raman | 2024-09-10 |
| 9921989 | Method, apparatus and system for modular on-die coherent interconnect for packetized communication | Yen-Cheng Liu, Antonio Juan, Steven R. Page, Jeffrey D. Chamberlain, Pau CABRE +2 more | 2018-03-20 |
| 9405687 | Method, apparatus and system for handling cache misses in a processor | Bahaa Fahim, Samuel D. Strom, Vedaraman Geetha, Robert G. Blankenship, Yen-Cheng Liu +1 more | 2016-08-02 |