Issued Patents All Time
Showing 1–25 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7981731 | Method of forming a high impedance antifuse | John A. Fifield, William R. Tonti | 2011-07-19 |
| 7226816 | Method of forming connection and anti-fuse in layered substrate such as SOI | Claude L. Bertin, Ramachandra Divakaruni, Jack A. Mandelman, William R. Tonti | 2007-06-05 |
| 7203102 | Semiconductor memory having tri-state driver device | Martin Brox, Helmut Schneider, Sabine Kieser | 2007-04-10 |
| 7098083 | High impedance antifuse | John A. Fifield, William R. Tonti | 2006-08-29 |
| 6972220 | Structures and methods of anti-fuse formation in SOI | Claude L. Bertin, Ramachandra Divakaruni, Jack A. Mandelman, William R. Tonti | 2005-12-06 |
| 6876250 | Low-power band-gap reference and temperature sensor circuit | Louis L. Hsu, Rajiv V. Joshi | 2005-04-05 |
| 6816403 | Capacitively coupled sensing apparatus and method for cross point magnetic random access memory devices | Ciaran J. Brennan, John K. DeBrosse | 2004-11-09 |
| 6812122 | Method for forming a voltage programming element | Claude L. Bertin, Erik L. Hedberg, Max G. Levy, Rick L. Mohler, William R. Tonti +1 more | 2004-11-02 |
| 6790722 | Logic SOI structure, process and application for vertical bipolar transistor | Ramachandra Divakaruni, Jack A. Mandelman, Wilbur D. Pricer, William R. Tonti | 2004-09-14 |
| 6753590 | High impedance antifuse | John A. Fifield, William R. Tonti | 2004-06-22 |
| 6693843 | Wordline on and off voltage compensation circuit based on the array device threshold voltage | Thomas M. Maffitt, Mark D. Jacunski, William R. Tonti, Kevin McStay | 2004-02-17 |
| 6629291 | Integrated power solution for system on chip applications | Joni C. Hsu, Louis L. Hsu, Li-Kong Wang | 2003-09-30 |
| 6596592 | Structures and methods of anti-fuse formation in SOI | Claude L. Bertin, Ramachandra Divakaruni, Jack A. Mandelman, William R. Tonti | 2003-07-22 |
| 6580650 | DRAM word line voltage control to insure full cell writeback level | Wayne F. Ellis, Mark D. Jacunski, Thomas M. Maffitt, William R. Tonti | 2003-06-17 |
| 6577154 | Constant impedance driver for high speed interface | John A. Fifield | 2003-06-10 |
| 6574763 | Method and apparatus for semiconductor integrated circuit testing and burn-in | Claude L. Bertin, Erik L. Hedberg, William R. Tonti | 2003-06-03 |
| 6570434 | Method to improve charge pump reliability, efficiency and size | Louis L. Hsu, Oliver Weinfurtner | 2003-05-27 |
| 6531911 | Low-power band-gap reference and temperature sensor circuit | Louis L. Hsu, Rajiv V. Joshi | 2003-03-11 |
| 6518827 | Sense amplifier threshold compensation | John A. Fifield, Robert H. Dennard, Toshiaki Kirihara, Wing K. Luk | 2003-02-11 |
| 6507237 | Low-power DC voltage generator system | Louis L. Hsu, Rajiv V. Joshi, Wayne F. Ellis, Jeffrey H. Dreibelbis | 2003-01-14 |
| 6498518 | Low input impedance line/bus receiver | Jack A. Mandelman, Azzouz Nezar, Wilbur D. Pricer, William R. Tonti | 2002-12-24 |
| 6492211 | Method for novel SOI DRAM BICMOS NPN | Ramachandra Divakaruni, Jack A. Mandelman, W. David Pricer, William R. Tonti | 2002-12-10 |
| 6436749 | Method for forming mixed high voltage (HV/LV) transistors for CMOS devices using controlled gate depletion | William R. Tonti, Claude L. Bertin, Jeffrey P. Gambino, Jack A. Mandelman, Wilbur D. Pricer | 2002-08-20 |
| 6429730 | Bias circuit for series connected decoupling capacitors | Christopher P. Miller | 2002-08-06 |
| 6396121 | Structures and methods of anti-fuse formation in SOI | Claude L. Bertin, Ramachandra Divakaruni, Jack A. Mandelman, William R. Tonti | 2002-05-28 |