SP

Stephen A. Parke

AS American Semiconductor: 8 patents #2 of 25Top 8%
IBM: 6 patents #16,453 of 70,183Top 25%
BU Boise State University: 1 patents #38 of 111Top 35%
University of California: 1 patents #8,022 of 18,278Top 45%
Overall (All Time): #300,554 of 4,157,543Top 8%
16
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8072006 Double-gated sensor cell Douglas R. Hackler, Sr., Richard A. Hayhurst 2011-12-06
7898009 Independently-double-gated transistor memory (IDGM) Dale G. Wilson, Kelly James DeGregorio, Douglas R. Hackler, Sr. 2011-03-01
7652330 Independently-double-gated combinational logic Douglas R. Hackler, Sr. 2010-01-26
7518189 Independently-double-gated field effect transistor Douglas R. Hackler, Sr. 2009-04-14
7154135 Double-gated transistor circuit Douglas R. Hackler, Sr. 2006-12-26
7019342 Double-gated transistor circuit Douglas R. Hackler, Sr. 2006-03-28
7015547 Multi-configurable independently multi-gated MOSFET Douglas R. Hackler, Sr. 2006-03-21
6919647 SRAM cell Douglas R. Hackler, Sr., Kelly James DeGregorio 2005-07-19
6580137 Damascene double gated transistors and related manufacturing methods 2003-06-17
6344381 Method for forming pillar CMOS John A. Bracchitta, Jack A. Mandelman, Matthew R. Wordeman 2002-02-05
6255699 Pillar CMOS structure John A. Bracchitta, Jack A. Mandelman, Matthew R. Wordeman 2001-07-03
6204532 Pillar transistor incorporating a body contact Jeffrey P. Gambino, Jack A. Mandelman, Matthew R. Wordeman 2001-03-20
6100123 Pillar CMOS structure John A. Bracchitta, Jack A. Mandelman, Matthew R. Wordeman 2000-08-08
6020239 Pillar transistor incorporating a body contact Jeffrey P. Gambino, Jack A. Mandelman, Matthew R. Wordeman 2000-02-01
5889410 Floating gate interlevel defect monitor and method Badih El-Kareh 1999-03-30
5559368 Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation Chenming Hu, Ping Keung Ko, Fariborz Assaderaghi 1996-09-24