Issued Patents All Time
Showing 25 most recent of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12402380 | Nondestructive characterization for crystalline wafers | Robert Tyler Leonard, Matthew David Conrad | 2025-08-26 |
| 12393214 | Device design for short-circuit protection of transistors | James Richmond, Philipp Steinmann | 2025-08-19 |
| 12376332 | Edge termination structures for semiconductor devices | Thomas E. Harrington, III | 2025-07-29 |
| 12322087 | Multi-scale autoencoders for semiconductor workpiece understanding | Matthew David Conrad | 2025-06-03 |
| 12237412 | Protection structures for semiconductor devices with sensor arrangements | Sei-Hyung Ryu | 2025-02-25 |
| 12159909 | Power semiconductor device with reduced strain | Daniel Jenner Lichtenwalner, Thomas E. Harrington, III, Shadi Sabri, Brett Hull, Brice McPherson +1 more | 2024-12-03 |
| 12087854 | Vertical semiconductor device with improved ruggedness | Daniel Jenner Lichtenwalner, Sei-Hyung Ryu, Kijeong Han | 2024-09-10 |
| 12074079 | Wide bandgap semiconductor device with sensor element | Joohyung Kim, Sei-Hyung Ryu, Kijeong Han, Thomas E. Harrington, III | 2024-08-27 |
| 12057389 | Transistor semiconductor die with increased active area | Daniel Jenner Lichtenwalner | 2024-08-06 |
| 12040355 | Nondestructive characterization for crystalline wafers | Robert Tyler Leonard, Matthew David Conrad | 2024-07-16 |
| 11869948 | Power semiconductor device with reduced strain | Daniel Jenner Lichtenwalner, Thomas E. Harrington, III, Shadi Sabri, Brett Hull, Brice McPherson +1 more | 2024-01-09 |
| 11837629 | Power semiconductor devices having gate trenches and buried edge terminations and related methods | Daniel Jenner Lichtenwalner, Brett Hull | 2023-12-05 |
| 11810912 | Semiconductor devices having asymmetric integrated gate resistors for balanced turn-on/turn-off behavior | In-Hwan Ji, Jae Hyung Park | 2023-11-07 |
| 11791378 | Superjunction power semiconductor devices formed via ion implantation channeling techniques and related methods | Alexander V. Suvorov, Vipindas Pala, Daniel Jenner Lichtenwalner, Qingchun Zhang | 2023-10-17 |
| 11721755 | Methods of forming semiconductor power devices having graded lateral doping | Philipp Steinmann, Jae Hyung Park, Vaishno Dasika | 2023-08-08 |
| 11662371 | Semiconductor devices for improved measurements and related methods | James Richmond | 2023-05-30 |
| 11600724 | Edge termination structures for semiconductor devices | Thomas E. Harrington, III | 2023-03-07 |
| 11579645 | Device design for short-circuitry protection circuitry within transistors | James Richmond, Philipp Steinmann | 2023-02-14 |
| 11489069 | Vertical semiconductor device with improved ruggedness | Daniel Jenner Lichtenwalner, Sei-Hyung Ryu, Kijeong Han | 2022-11-01 |
| 11417760 | Vertical semiconductor device with improved ruggedness | Daniel Jenner Lichtenwalner | 2022-08-16 |
| 11361454 | Alignment for wafer images | Robert Tyler Leonard, Matthew David Conrad | 2022-06-14 |
| 11282927 | Contact structures for semiconductor devices | Edward Lloyd Hutchins, Jae Hyung Park | 2022-03-22 |
| 11282951 | Semiconductor power devices having graded lateral doping in the source region | Philipp Steinmann, Jae Hyung Park, Vaishno Dasika | 2022-03-22 |
| 11222955 | Semiconductor power devices having gate dielectric layers with improved breakdown characteristics and methods of forming such devices | Daniel Jenner Lichtenwalner, Brett Hull, Shadi Sabri, Matt N. McCain | 2022-01-11 |
| 11164813 | Transistor semiconductor die with increased active area | Daniel Jenner Lichtenwalner | 2021-11-02 |