Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12159909 | Power semiconductor device with reduced strain | Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Thomas E. Harrington, III, Shadi Sabri, Brice McPherson +1 more | 2024-12-03 |
| 11869948 | Power semiconductor device with reduced strain | Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Thomas E. Harrington, III, Shadi Sabri, Brice McPherson +1 more | 2024-01-09 |
| 11837629 | Power semiconductor devices having gate trenches and buried edge terminations and related methods | Daniel Jenner Lichtenwalner, Edward Robert Van Brunt | 2023-12-05 |
| 11222955 | Semiconductor power devices having gate dielectric layers with improved breakdown characteristics and methods of forming such devices | Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Shadi Sabri, Matt N. McCain | 2022-01-11 |
| 11184001 | Power switching devices with high dV/dt capability and methods of making such devices | Qingchun Zhang, Adam Barkley, Sei-Hyung Ryu | 2021-11-23 |
| 10886396 | Transistor structures having a deep recessed P+ junction and methods for making same | Qingchun Zhang | 2021-01-05 |
| 10861931 | Power semiconductor devices having gate trenches and buried edge terminations and related methods | Daniel Jenner Lichtenwalner, Edward Robert Van Brunt | 2020-12-08 |
| 10847647 | Power semiconductor devices having top-side metallization structures that include buried grain stop layers | Shadi Sabri, Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Scott Allen | 2020-11-24 |
| 10840367 | Transistor structures having reduced electrical field at the gate oxide and methods for making same | Qingchun Zhang | 2020-11-17 |
| 10601413 | Power switching devices with DV/DT capability and methods of making such devices | Qingchun Zhang, Adam Barkley, Sei-Hyung Ryu | 2020-03-24 |
| 10510905 | Power Schottky diodes having closely-spaced deep blocking junctions in a heavily-doped drift region | Qingchun Zhang, Edward Robert Van Brunt, Scott Allen | 2019-12-17 |
| 10115815 | Transistor structures having a deep recessed P+ junction and methods for making same | Qingchun Zhang | 2018-10-30 |
| 10068834 | Floating bond pad for power semiconductor devices | Sarah Haney, Daniel Namishia | 2018-09-04 |
| 9887287 | Power semiconductor devices having gate trenches with implanted sidewalls and related methods | Daniel Jenner Lichtenwalner, Edward Robert Van Brunt, Alexander V. Suvorov, Craig Capell | 2018-02-06 |
| 9640652 | Semiconductor devices including epitaxial layers and related methods | Qingchun Zhang | 2017-05-02 |
| 9530844 | Transistor structures having reduced electrical field at the gate oxide and methods for making same | Qingchun Zhang | 2016-12-27 |
| 9455356 | High power silicon carbide (SiC) PiN diodes having low forward voltage drops | Mrinal K. Das, Joseph Sumakeris | 2016-09-27 |
| 8536066 | Methods of forming SiC MOSFETs with high inversion layer mobility | Mrinal K. Das, Sumi Krishnaswami | 2013-09-17 |
| 8314462 | Semiconductor devices including electrodes with integrated resistances | Sei-Hyung Ryu, James Richmond | 2012-11-20 |
| 8288220 | Methods of forming semiconductor devices including epitaxial layers and related structures | Qingchun Zhang | 2012-10-16 |
| 7727904 | Methods of forming SiC MOSFETs with high inversion layer mobility | Mrinal K. Das, Sumi Krishnaswami | 2010-06-01 |