Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11075264 | Super junction power semiconductor devices formed via ion implantation channeling techniques and related methods | Alexander V. Suvorov, Vipindas Pala, Daniel Jenner Lichtenwalner, Qingchun Zhang | 2021-07-27 |
| 11057033 | Hybrid power module | Adam Barkley, Sei-Hyung Ryu, Zachary Cole, Kraig J. Olejniczak | 2021-07-06 |
| 10998418 | Power semiconductor devices having reflowed inter-metal dielectric layers | Daniel Jenner Lichtenwalner, Shadi Sabri | 2021-05-04 |
| 10950719 | Seminconductor device with spreading layer | Vipindas Pala, Lin Cheng, Anant Agarwal, John Williams Palmour | 2021-03-16 |
| 10867797 | Methods and apparatuses related to shaping wafers fabricated by ion implantation | Alexander V. Suvorov, Robert Tyler Leonard | 2020-12-15 |
| 10868169 | Monolithically integrated vertical power transistor and bypass diode | Vipindas Pala, Lin Cheng, Anant Agarwal, John Williams Palmour | 2020-12-15 |
| 10861931 | Power semiconductor devices having gate trenches and buried edge terminations and related methods | Daniel Jenner Lichtenwalner, Brett Hull | 2020-12-08 |
| 10847647 | Power semiconductor devices having top-side metallization structures that include buried grain stop layers | Shadi Sabri, Daniel Jenner Lichtenwalner, Scott Allen, Brett Hull | 2020-11-24 |
| 10615274 | Vertical semiconductor device with improved ruggedness | Daniel Jenner Lichtenwalner | 2020-04-07 |
| 10600903 | Semiconductor device including a power transistor device and bypass diode | Vipindas Pala, Lin Cheng | 2020-03-24 |
| 10510905 | Power Schottky diodes having closely-spaced deep blocking junctions in a heavily-doped drift region | Qingchun Zhang, Brett Hull, Scott Allen | 2019-12-17 |
| 10103230 | Methods of forming buried junction devices in silicon carbide using ion implant channeling and silicon carbide devices including buried junctions | Alexander V. Suvorov, Vipindas Pala, Lin Cheng | 2018-10-16 |
| 9972677 | Methods of forming power semiconductor devices having superjunction structures with pillars having implanted sidewalls | Vipindas Pala, Lin Cheng, Daniel Jenner Lichtenwalner | 2018-05-15 |
| 9887287 | Power semiconductor devices having gate trenches with implanted sidewalls and related methods | Daniel Jenner Lichtenwalner, Brett Hull, Alexander V. Suvorov, Craig Capell | 2018-02-06 |
| 9515199 | Power semiconductor devices having superjunction structures with implanted sidewalls | Vipindas Pala, Lin Cheng, Daniel Jenner Lichtenwalner | 2016-12-06 |
| 9484413 | Methods of forming buried junction devices in silicon carbide using ion implant channeling and silicon carbide devices including buried junctions | Alexander V. Suvorov, Vipindas Pala, Lin Cheng | 2016-11-01 |
| 9425265 | Edge termination technique for high voltage power devices having a negative feature for an improved edge termination structure | Vipindas Pala, Lin Cheng, Anant Agarwal | 2016-08-23 |
| 9318597 | Layout configurations for integrating schottky contacts into a power transistor device | Vipindas Pala, Lin Cheng, John Williams Palmour | 2016-04-19 |
| 9236433 | Semiconductor devices in SiC using vias through N-type substrate for backside contact to P-type layer | Vipindas Pala, Daniel Jenner Lichtenwalner, Lin Cheng, Anant Agarwal, John Williams Palmour | 2016-01-12 |
| 9064738 | Methods of forming junction termination extension edge terminations for high power semiconductor devices and related semiconductor devices | Vipindas Pala, Lin Cheng, Anant Agarwal | 2015-06-23 |