Issued Patents All Time
Showing 25 most recent of 189 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12386618 | Multi-buffered register files with shared access circuits | Steven Hsu, Amit Agarwal, Debabrata Mohapatra, Arnab Raha, Moongon Jung +1 more | 2025-08-12 |
| 12361269 | LSTM circuit with selective input computation | Gregory K. Chen, Raghavan Kumar, Phil Knag, Huseyin Ekin Sumbul | 2025-07-15 |
| 12334392 | Multi-height interconnect trenches for resistance and capacitance optimization | Kevin Lin, Mauro J. Kobrinsky, Mark A. Anders, Himanshu Kaul | 2025-06-17 |
| 12243148 | Apparatus and method for approximate trilinear interpolation for scene reconstruction | Vivek K. De, Amit Agarwal, Steven Hsu, Monodeep Kar | 2025-03-04 |
| 12223615 | Apparatus and method for approximate trilinear interpolation for scene reconstruction | Vivek K. De, Amit Agarwal, Steven Hsu, Monodeep Kar | 2025-02-11 |
| 11812599 | Compute near memory with backend memory | Abhishek A. Sharma, Noriyuki Sato, Sarah Atanasov, Huseyin Ekin Sumbul, Gregory K. Chen +3 more | 2023-11-07 |
| 11790217 | LSTM circuit with selective input computation | Gregory K. Chen, Raghavan Kumar, Phil Knag, Huseyin Ekin Sumbul | 2023-10-17 |
| 11791819 | Low power flip-flop with reduced parasitic capacitance | Steven Hsu, Amit Agarwal, Simeon Realov | 2023-10-17 |
| 11783160 | Memoryless weight storage hardware for neural networks | Phil Knag, Gregory K. Chen, Raghavan Kumar, Huseyin Ekin Sumbul | 2023-10-10 |
| 11757434 | High performance fast Mux-D scan flip-flop | Amit Agarwal, Steven Hsu, Simeon Realov, Mahesh Kumashikar | 2023-09-12 |
| 11751404 | FinFET transistor based resistive random access memory | Abhishek A. Sharma, Gregory K. Chen, Phil Knag, Raghavan Kumar, Sasikanth Manipatruni +3 more | 2023-09-05 |
| 11726950 | Compute near memory convolution accelerator | Huseyin Ekin Sumbul, Gregory K. Chen, Phil Knag, Raghavan Kumar | 2023-08-15 |
| 11727260 | Applications of back-end-of-line (BEOL) capacitors in compute-in-memory (CIM) circuits | Abhishek A. Sharma, Jack T. Kavalieros, Ian A. Young, Sasikanth Manipatruni, Uygar E. Avci +7 more | 2023-08-15 |
| 11699681 | Multi-chip module having a stacked logic chip and memory stack | Abhishek A. Sharma, Hui Jae Yoo, Van H. Le, Huseyin Ekin Sumbul, Phil Knag +1 more | 2023-07-11 |
| 11663452 | Processor array for processing sparse binary neural networks | Gregory K. Chen, Raghavan Kumar, Phil Knag, Huseyin Ekin Sumbul, Deepak Kadetotad | 2023-05-30 |
| 11625584 | Reconfigurable memory compression techniques for deep neural networks | Raghavan Kumar, Gregory K. Chen, Huseyin Ekin Sumbul, Phil Knag | 2023-04-11 |
| 11522012 | Deep in memory architecture using resistive switches | Jack T. Kavalieros, Ian A. Young, Ravi Pillarisetty, Sasikanth Manipatruni, Gregory K. Chen +7 more | 2022-12-06 |
| 11502696 | In-memory analog neural cache | Amrita Mathuriya, Sasikanth Manipatruni, Victor W. Lee, Huseyin Ekin Sumbul, Gregory K. Chen +4 more | 2022-11-15 |
| 11442103 | Multibit vectored sequential with scan | Amit Agarwal, Satish K. Damaraju, Steven Hsu, Simeon Realov | 2022-09-13 |
| 11416165 | Low synch dedicated accelerator with in-memory computation capability | Amrita Mathuriya, Sasikanth Manipatruni, Victor W. Lee, Huseyin Ekin Sumbul, Gregory K. Chen +4 more | 2022-08-16 |
| 11398814 | Low-power single-edge triggered flip-flop, and time borrowing internally stitched flip-flop | Steven Hsu, Amit Agarwal, Simeon Realov, Satish K. Damaraju | 2022-07-26 |
| 11347994 | Weight prefetch for in-memory neural network execution | Amrita Mathuriya, Sasikanth Manipatruni, Victor W. Lee, Huseyin Ekin Sumbul, Gregory K. Chen +4 more | 2022-05-31 |
| 11347477 | Compute in/near memory (CIM) circuit architecture for unified matrix-matrix and matrix-vector computations | Huseyin Ekin Sumbul, Gregory K. Chen, Phil Knag, Raghavan Kumar | 2022-05-31 |
| 11296681 | High performance fast Mux-D scan flip-flop | Amit Agarwal, Steven Hsu, Simeon Realov, Mahesh Kumashikar | 2022-04-05 |
| 11294985 | Efficient analog in-memory matrix multiplication processor | Amrita Mathuriya, Sasikanth Manipatruni, Dmitri E. Nikonov, Ian A. Young | 2022-04-05 |