Issued Patents All Time
Showing 25 most recent of 64 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11502696 | In-memory analog neural cache | Amrita Mathuriya, Sasikanth Manipatruni, Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar +4 more | 2022-11-15 |
| 11416165 | Low synch dedicated accelerator with in-memory computation capability | Amrita Mathuriya, Sasikanth Manipatruni, Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar +4 more | 2022-08-16 |
| 11347994 | Weight prefetch for in-memory neural network execution | Amrita Mathuriya, Sasikanth Manipatruni, Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar +4 more | 2022-05-31 |
| 11151046 | Programmable interface to in-memory cache processor | Amrita Mathuriya, Sasikanth Manipatruni, Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar +4 more | 2021-10-19 |
| 10884957 | Pipeline circuit architecture to provide in-memory computation functionality | Amrita Mathuriya, Sasikanth Manipatruni, Abhishek A. Sharma, Huseyin Ekin Sumbul, Gregory K. Chen +4 more | 2021-01-05 |
| 10775873 | Performing power management in a multicore processor | Edward T. Grochowski, Daehyun Kim, Yuxin Bai, Sheng Li, Naveen Mellempudi +1 more | 2020-09-15 |
| 10768989 | Virtual vector processing | Anthony Nguyen, Engin Ipek, Daehyun Kim, Mikhail Smelyanskiy | 2020-09-08 |
| 10705967 | Programmable interface to in-memory cache processor | Amrita Mathuriya, Sasikanth Manipatruni, Huseyin Ekin Sumbul, Gregory K. Chen, Raghavan Kumar +4 more | 2020-07-07 |
| 10579378 | Instructions for manipulating a multi-bit predicate register for predicating instruction sequences | Edward T. Grochowski, Sergey A. Rozhkov, Boris A. Babayan | 2020-03-03 |
| 10372450 | Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate | Daehyun Kim, Tin-Fook Ngai, Jayashankar Bharadwaj, Albert Hartono, Sara S. Baghsorkhi +1 more | 2019-08-06 |
| 10234930 | Performing power management in a multicore processor | Edward T. Grochowski, Daehyun Kim, Yuxin Bai, Sheng Li, Naveen Mellempudi +1 more | 2019-03-19 |
| 10152325 | Instruction and logic to provide pushing buffer copy and store functionality | Christopher J. Hughes, Changkyu Kim, Daehyun Kim, Jong Soo Park | 2018-12-11 |
| 10146286 | Dynamically updating a power management policy of a processor | Yuxin Bai | 2018-12-04 |
| 9921832 | Instruction to reduce elements in a vector register with strided access pattern | Albert Hartono, Jayashankar Bharadwaj, Nalini Vasudevan, Sara S. Baghsorkhi, Daehyun Kim | 2018-03-20 |
| 9910481 | Performing power management in a multicore processor | Daehyun Kim, Yuxin Bai, Shihao Ji, Sheng Li, Dhiraj D. Kalamkar +1 more | 2018-03-06 |
| 9898266 | Loop vectorization methods and apparatus | Nalini Vasudevan, Jayashankar Bharadwaj, Christopher J. Hughes, Milind B. Girkar, Mark J. Charney +4 more | 2018-02-20 |
| 9870267 | Virtual vector processing | Anthony Nguyen, Engin Ipek, Daehyun Kim, Mikhail Smelyanskiy | 2018-01-16 |
| 9798541 | Apparatus and method for propagating conditionally evaluated values in SIMD/vector execution using an input mask register | Jayashankar Bharadwaj, Nalini Vasudevan, Daehyun Kim, Albert Hartono, Sara S. Baghsorkhi | 2017-10-24 |
| 9727471 | Method and apparatus for stream buffer management instructions | Daehyun Kim, Changkyu Kim, Jatin Chhugani, Nadathur Rajagopalan Satish | 2017-08-08 |
| 9703558 | Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate | Daehyun Kim, Tin-Fook Ngai, Jayashankar Bharadwaj, Albert Hartono, Sara S. Baghsorkhi +1 more | 2017-07-11 |
| 9690716 | High performance persistent memory for region-centric consistent and atomic updates | Sheng Li, Sanjay Kumar, Rajesh M. Sankaran, Subramanya R. Dulloor | 2017-06-27 |
| 9690552 | Technologies for low-level composable high performance computing libraries | Hongbo Rong, Peng Tu, Tatiana Shpeisman, Hai Paul Liu, Todd Alan Anderson +5 more | 2017-06-27 |
| 9678750 | Vector instructions to enable efficient synchronization and parallel reduction operations | Mikhail Smelyanskiy, Christopher J. Hughes, Daehyun Kim, Yen-Kuang Chen, Changkyu Kim +3 more | 2017-06-13 |
| 9563425 | Instruction and logic to provide pushing buffer copy and store functionality | Christopher J. Hughes, Changkyu Kim, Daehyun Kim, Jong Soo Park | 2017-02-07 |
| 9513905 | Vector instructions to enable efficient synchronization and parallel reduction operations | Mikhail Smelyanskiy, Sanjeev Kumar, Daehyun Kim, Jatin Chhugani, Changkyu Kim +3 more | 2016-12-06 |