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USPTO Patent Rankings Data through Dec 31, 2025
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Albert Hartono — 17 Patents

Intel: 17 patents #2,442 of 30,777Top 8%
Santa Clara, CA: #984 of 9,301 inventorsTop 15%
California: #35,467 of 386,348 inventorsTop 10%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Albert Hartono has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 2015 and the most recent in September 2019. Albert Hartono ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Albert Hartono in Santa Clara, CA, US.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10402177 Methods and systems to vectorize scalar computer program loops having loop-carried dependences Jayashankar Bharadwaj, Nalini Vasudevan, Sara S. Baghsorkhi 2019-09-03 $18,715,000
10372450 Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate Victor W. Lee, Daehyun Kim, Tin-Fook Ngai, Jayashankar Bharadwaj, Sara S. Baghsorkhi +1 more 2019-08-06 $15,127,000
10324768 Lightweight restricted transactional memory for speculative compiler optimization Cheng Wang, Youfeng Wu, Sara S. Baghsorkhi, Robert Valentine 2019-06-18 $21,210,000
9921832 Instruction to reduce elements in a vector register with strided access pattern Jayashankar Bharadwaj, Nalini Vasudevan, Sara S. Baghsorkhi, Victor W. Lee, Daehyun Kim 2018-03-20 $13,809,000
9910650 Method and apparatus for approximating detection of overlaps between memory ranges Nalini Vasudevan, Sara S. Baghsorkhi, Cheng Wang, Youfeng Wu 2018-03-06 $18,859,000
9898266 Loop vectorization methods and apparatus Nalini Vasudevan, Jayashankar Bharadwaj, Christopher J. Hughes, Milind B. Girkar, Mark J. Charney +4 more 2018-02-20 $17,556,000
9798541 Apparatus and method for propagating conditionally evaluated values in SIMD/vector execution using an input mask register Jayashankar Bharadwaj, Nalini Vasudevan, Victor W. Lee, Daehyun Kim, Sara S. Baghsorkhi 2017-10-24 $10,797,000
9733913 Methods and systems to vectorize scalar computer program loops having loop-carried dependences Jayashankar Bharadwaj, Nalini Vasudevan, Sara S. Baghsorkhi 2017-08-15 $8,272,000
9720667 Automatic loop vectorization using hardware transactional memory Sara S. Baghsorkhi, Youfeng Wu, Nalini Vasudevan, Cheng Wang 2017-08-01 $11,137,000
9710279 Method and apparatus for speculative vectorization Nalini Vasudevan, Cheng Wang, Youfeng Wu, Sara S. Baghsorkhi 2017-07-18 $6,909,000
9703558 Systems, apparatuses, and methods for setting an output mask in a destination writemask register from a source write mask register using an input writemask and immediate Victor W. Lee, Daehyun Kim, Tin-Fook Ngai, Jayashankar Bharadwaj, Sara S. Baghsorkhi +1 more 2017-07-11 $8,311,000
9690582 Instruction and logic for cache-based speculative vectorization Nalini Vasudevan, Youfeng Wu, Cheng Wang, Sara S. Baghsorkhi 2017-06-27 $7,334,000
9588814 Fast approximate conflict detection Sara S. Baghsorkhi, Youfeng Wu, Cheng Wang 2017-03-07 $9,849,000
9268626 Apparatus and method for vectorization with speculation support Jayashankar Bharadwaj, Victor W. Lee, Kim Daehyun, Nalini Vasudevan, Tin-Fook Ngai +1 more 2016-02-23 $10,383,000
9268541 Methods and systems to vectorize scalar computer program loops having loop-carried dependences Jayashankar Bharadwaj, Nalini Vasudevan, Sara S. Baghsorkhi 2016-02-23 $10,383,000
9244677 Loop vectorization methods and apparatus Nalini Vasudevan, Jayashankar Bharadwaj, Christopher J. Hughes, Milind B. Girkar, Mark J. Charney +4 more 2016-01-26 $9,792,000
9189236 Speculative non-faulting loads and gathers Jayashankar Bharadwaj, Nalini Vasudevan, Victor W. Lee, Sara S. Baghsorkhi, Daehyun Kim 2015-11-17 $15,457,000