Boris A. Babayan — 12 Patents at Intel

Boris A. Babayan has been granted 12 US patents while listed as an inventor at Intel. The first was granted in 2016 and the most recent in March 2020. Boris A. Babayan ranks #396,045 of 4,157,543 US inventors in our database (top 9.5%). Patent records list Boris A. Babayan in Moscow, RU.

Issued Patents All Time

Showing 1–12 of 12 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
10579378	Instructions for manipulating a multi-bit predicate register for predicating instruction sequences	Edward T. Grochowski, Victor W. Lee, Sergey A. Rozhkov	2020-03-03	$18,388,000
10514927	Instruction and logic for sorting and retiring stores	Anton Lechanka, Andrey Efimov, Sergey Y. Shishlov, Andrey Kluchnikov, Kamil Garifullin +1 more	2019-12-24	$26,956,000
10241789	Method to do control speculation on loads in a high performance strand-based loop accelerator	Alexander Y. Ostanevich, Sergey P. Scherbinin, Jayesh Iyer, Dmitry M. Maslennikov, Denis G. Motin +3 more	2019-03-26	$18,583,000
10241794	Apparatus and methods to support counted loop exits in a multi-strand loop processor	Sergey P. Scherbinin, Jayesh Iyer, Alexander Y. Ostanevich, Dmitry M. Maslennikov, Denis G. Motin +3 more	2019-03-26	$18,583,000
10241801	Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop accelerator	Jayesh Iyer, Sergey P. Scherbinin, Alexander Y. Ostanevich, Dmitry M. Maslennikov, Denis G. Motin +3 more	2019-03-26	$18,583,000
10235171	Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor	Alexander Y. Ostanevich, Jayesh Iyer, Sergey P. Scherbinin, Dmitry M. Maslennikov, Denis G. Motin +3 more	2019-03-19	$29,538,000
10133582	Instruction and logic for identifying instructions for retirement in a multi-strand out-of-order processor	Nikolay Kosarev, Sergey Y. Shishlov, Jayesh Iyer, Alexander V. Butuzov, Andrey Kluchnikov	2018-11-20	$25,900,000
10095623	Hardware apparatuses and methods to control access to a multiple bank data cache	Andrey Kluchnikov, Jayesh Iyer, Sergey Y. Shishlov	2018-10-09	$20,353,000
9811340	Method and apparatus for reconstructing real program order of instructions in multi-strand out-of-order processor	Nikolay Kosarev, Jayesh Iyer, Sergey Y. Shishlov, Andrey Kluchnikov, Alexander V. Butuzov +2 more	2017-11-07	$13,901,000
9645819	Method and apparatus for reducing area and complexity of instruction wakeup logic in a multi-strand out-of-order processor	Jayesh Iyer, Nikolay Kosarev, Sergey Y. Shishlov, Alexey Y. Sivtsov, Alexander V. Butuzov +1 more	2017-05-09	$10,144,000
9529596	Method and apparatus for scheduling instructions in a multi-strand out of order processor with instruction synchronization bits and scoreboard bits	Vladimir Pentkovski, Alexander V. Butuzov, Sergey Y. Shishlov, Alexey Y. Sivtsov, Nikolay Kosarev	2016-12-27	$11,980,000
9471501	Hardware apparatuses and methods to control access to a multiple bank data cache	Andrey Kluchnikov, Jayesh Iyer, Sergey Y. Shishlov	2016-10-18	$9,528,000

Boris A. Babayan — 12 Patents

Issued Patents All Time

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