| 10241789 |
Method to do control speculation on loads in a high performance strand-based loop accelerator |
Sergey P. Scherbinin, Jayesh Iyer, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
2019-03-26 |
| 10241794 |
Apparatus and methods to support counted loop exits in a multi-strand loop processor |
Sergey P. Scherbinin, Jayesh Iyer, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
2019-03-26 |
| 10241801 |
Method and apparatus to create register windows for parallel iterations to achieve high performance in HW-SW codesigned loop accelerator |
Jayesh Iyer, Sergey P. Scherbinin, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
2019-03-26 |
| 10235171 |
Method and apparatus to efficiently handle allocation of memory ordering buffers in a multi-strand out-of-order loop processor |
Jayesh Iyer, Sergey P. Scherbinin, Dmitry M. Maslennikov, Denis G. Motin, Alexander V. Ermolovich +3 more |
2019-03-19 |
| 8677338 |
Data dependence testing for loop fusion with code replication, array contraction, and loop interchange |
John L. Ng, Rakesh Krishnaiyer |
2014-03-18 |
| 8453134 |
Improving data locality and parallelism by code replication |
John L. Ng, Alexander L. Sushentsov |
2013-05-28 |
| 6954927 |
Hardware supported software pipelined loop prologue optimization |
— |
2005-10-11 |
| 6718541 |
Register economy heuristic for a cycle driven multiple issue instruction scheduler |
Vladimir Y. Volkonsky |
2004-04-06 |
| 6594824 |
Profile driven code motion and scheduling |
Vladimir Y. Volkonsky, Alexander L. Sushentsov |
2003-07-15 |