Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10514927 | Instruction and logic for sorting and retiring stores | Anton Lechanka, Andrey Efimov, Sergey Y. Shishlov, Kamil Garifullin, Igor Burovenko +1 more | 2019-12-24 |
| 10133582 | Instruction and logic for identifying instructions for retirement in a multi-strand out-of-order processor | Nikolay Kosarev, Sergey Y. Shishlov, Jayesh Iyer, Alexander V. Butuzov, Boris A. Babayan | 2018-11-20 |
| 10095522 | Instruction and logic for register based hardware memory renaming | Kamil Garifullin, Stanislav Shwartsman, Lihu Rappoport, Zeev Sperber, Pavel I. Kryukov +4 more | 2018-10-09 |
| 10095623 | Hardware apparatuses and methods to control access to a multiple bank data cache | Jayesh Iyer, Sergey Y. Shishlov, Boris A. Babayan | 2018-10-09 |
| 9811340 | Method and apparatus for reconstructing real program order of instructions in multi-strand out-of-order processor | Nikolay Kosarev, Jayesh Iyer, Sergey Y. Shishlov, Alexander V. Butuzov, Boris A. Babayan +2 more | 2017-11-07 |
| 9471501 | Hardware apparatuses and methods to control access to a multiple bank data cache | Jayesh Iyer, Sergey Y. Shishlov, Boris A. Babayan | 2016-10-18 |