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USPTO Patent Rankings Data through Dec 31, 2025
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Vladimir Pentkovski — 41 Patents

Intel: 41 patents #856 of 30,777Top 3%
Folsom, CA: #58 of 1,500 inventorsTop 4%
California: #11,075 of 386,348 inventorsTop 3%
Overall (All Time): #75,001 of 4,157,543Top 2%
41 Patents All Time
Vladimir Pentkovski has been granted 41 US patents while listed as an inventor at Intel. The first was granted in 1999 and the most recent in April 2017. Vladimir Pentkovski ranks #75,001 of 4,157,543 US inventors in our database (top 1.8%). Patent records list Vladimir Pentkovski in Folsom, CA, US.

Issued Patents All Time

Showing 1–25 of 41 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9632790 Select logic for the instruction scheduler of a multi strand out-of-order processor based on delayed reconstructed program order Jayesh Iyer, Nikolay Kosarev, Sergey Y. Shishlov, Alexey Y. Sivtsov, Yuriy V Baida +2 more 2017-04-25 $8,972,000
9529596 Method and apparatus for scheduling instructions in a multi-strand out of order processor with instruction synchronization bits and scoreboard bits Boris A. Babayan, Alexander V. Butuzov, Sergey Y. Shishlov, Alexey Y. Sivtsov, Nikolay Kosarev 2016-12-27 $11,980,000
8065555 System and method for error correction in cache units Subramaniam Maiyuran, Varghese George, Sanjib Sarkar, Marina Sherman 2011-11-22 $16,463,000
7516307 Processor for computing a packed sum of absolute differences and packed multiply-add Mohammad Abdallah 2009-04-07 $17,723,000
7512498 Streaming processing of biological sequence matching 2009-03-31 $17,039,000
7467286 Executing partial-width packed data instructions Mohammad Abdallah, James S. Coke, Patrice Roussel, Shreekant S. Thakkar 2008-12-16 $21,903,000
7216138 Method and apparatus for floating point operations and format conversion operations Mohammad Abdallah, Prasad Modali, Thomas R. Huff, Patrice Roussel, Shreekant S. Thakkar +1 more 2007-05-08 $17,693,000
7114011 Multiprocessor-scalable streaming data server arrangement Deep Buch, Zhenjun Hu, Neil Schaper, David Zhao 2006-09-26 $21,238,000
6978357 Method and apparatus for performing cache segment flush and cache segment invalidation operations Lance Hacking, Shreekant S. Thakkar, Thomas R. Huff, Hsien-Cheng E. Hsieh 2005-12-20 $37,307,000
6976131 Method and apparatus for shared cache coherency for a chip multiprocessor or multiprocessor system Vivek Garg, Narayanan Iyer, Jagannath Keshava 2005-12-13 $11,810,000
6976099 Selective interrupt delivery to multiple processors having independent operating systems Varghese George, Edward Gamsaragan, Deep Buch, Paul Zagacki 2005-12-13 $11,810,000
6970994 Executing partial-width packed data instructions Mohammad Abdallah, James S. Coke, Patrice Roussel, Shreekant S. Thakkar 2005-11-29 $29,558,000
6819321 Method and apparatus for processing 2D operations in a tiled graphics architecture Hsien-Cheng E. Hsieh, Hsin-Chu Tsai 2004-11-16 $29,403,000
6801208 System and method for cache sharing Jagganath Keshava, Subramaniam Maiyuran, Salvador Palanca, Hsin-Chu Tsai 2004-10-05 $22,015,000
6772241 Selective interrupt delivery to multiple processors having independent operating systems Varghese George, Edward Gamsaragan, Deep Buch, Paul Zagacki 2004-08-03 $15,005,000
6748512 Method and apparatus for mapping address space of integrated programmable devices within host system memory Deep Buch, Varghese George, Paul Zagacki, Edward Gamsaragan 2004-06-08 $20,315,000
6643745 Method and apparatus for prefetching data into cache Salvador Palanca, Niranjan L. Cooray, Angad Narang, Steve Tsai, Subramaniam Maiyuran +5 more 2003-11-04 $42,713,000
6584547 Shared cache structure for temporal and non-temporal instructions Salvador Palanca, Niranjan L. Cooray, Angad Narang, Steve Tsai 2003-06-24 $97,005,000
6502115 Conversion between packed floating point data and packed 32-bit integer data in different architectural registers Mohammad Abdallah, Hsien-Cheng E. Hsieh, Thomas R. Huff, Patrice Roussel, Shreekant S. Thakkar 2002-12-31 $37,060,000
6480868 Conversion from packed floating point data to packed 8-bit integer data in different architectural registers Mohammad Abdallah, Hsien-Cheng E. Hsieh, Thomas R. Huff, Patrice Roussel, Shreekant S. Thakkar 2002-11-12 $72,895,000
6466217 Method and apparatus for ensuring backward compatibility in a bucket rendering system Hsien-Cheng E. Hsieh 2002-10-15 $56,657,000
6377970 Method and apparatus for computing a sum of packed data elements using SIMD multiply circuitry Mohammad Abdallah 2002-04-23 $65,430,000
6369813 Processing polygon meshes using mesh pool window Deep Buch, Michael K. Dwyer, Hsien-Hsin Sean Lee, Hsien-Cheng E. Hsieh 2002-04-09 $80,316,000
6356270 Efficient utilization of write-combining buffers Hsien-Cheng E. Hsieh, Hsien-Hsin Sean Lee, Subramaniam Maiyuran 2002-03-12 $133,761,000
6292815 Data conversion between floating point packed format and integer scalar format Mohammad Abdallah, Hsien-Cheng E. Hsieh, Thomas R. Huff, Patrice Roussel, Shreekant S. Thakkar 2001-09-18 $133,519,000