Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9323533 | Supervisor mode execution protection | Adriaan Van De Ven, Baiju V. Patel, Asit K. Mallick, Gilbert Neiger, Martin G. Dixon +1 more | 2016-04-26 |
| 9239801 | Systems and methods for preventing unauthorized stack pivoting | Baiju V. Patel, Xiaoning Li, H P. ANVIN, Asit K. Mallick, Gilbert Neiger +5 more | 2016-01-19 |
| RE45458 | Dual function system and method for shuffling packed data elements | Patrice Roussel, Srinivas Chennupaty, Micheal Cranford, Mohammed Abdallah, Katherine Kong | 2015-04-07 |
| 8938606 | System, apparatus, and method for segment register read and write regardless of privilege level | Baiju V. Patel, Gilbert Neiger, Martin G. Dixon, James B. Crossland | 2015-01-20 |
| 8793470 | Length determination of instruction code with address form field and escape opcode value by evaluating portions other than instruction specific opcode | Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov, Scott Dion Rodgers +2 more | 2014-07-29 |
| 8489660 | Digital random number generator using partially entropic data | Howard C. Herbert, George W. Cox, Shay Gueron, Jesse Walker, Charles E. Dike +7 more | 2013-07-16 |
| 8402252 | Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode | Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov, Scott Dion Rodgers +2 more | 2013-03-19 |
| 8161269 | Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcode | Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov, Scott Dion Rodgers +2 more | 2012-04-17 |
| 7966476 | Determining length of instruction with escape and addressing form bytes without evaluating opcode | Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov, Scott Dion Rodgers +2 more | 2011-06-21 |
| 7917734 | Determining length of instruction with multiple byte escape code based on information from other than opcode byte | Peter J. Ruscito, Masood Tahir, David Brian Jackson, Ves A. Naydenov, Scott Dion Rodgers +2 more | 2011-03-29 |
| 7467286 | Executing partial-width packed data instructions | Mohammad Abdallah, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar | 2008-12-16 |
| 7430578 | Method and apparatus for performing multiply-add operations on packed byte data | Eric L. Debes, William W. Macy, Jonathan J. Tyler, Frank Binns, Scott Dion Rodgers +5 more | 2008-09-30 |
| 6970994 | Executing partial-width packed data instructions | Mohammad Abdallah, Vladimir Pentkovski, Patrice Roussel, Shreekant S. Thakkar | 2005-11-29 |
| 6233671 | Staggering execution of an instruction by dividing a full-width macro instruction into at least two partial-width micro instructions | Mohammad Abdallah, Steve Fischer, Vladmir Pentkovski | 2001-05-15 |
| 6192467 | Executing partial-width packed data instructions | Mohammad Abdallah, Vladimir Pentkovski | 2001-02-20 |
| 6122725 | Executing partial-width packed data instructions | Patrice Roussel, Ticky Thakkar, Mohammad Abdallah, Vladimir Pentkovski | 2000-09-19 |
| 6026455 | Architecture and method for providing guaranteed access for a retrying bus master to a data transfer bridge connecting two buses in a computer system | Nilesh V. Shah, Jasmin Ajanovic, Dahmane Dahmani, Rajeev Prasad | 2000-02-15 |
| 5794070 | Method and apparatus for fast DMA transfer on an industry standard architecture (ISA) bus | Jeffrey L. Rabe, Dave Smyth, David D. Lent, Sathyamurthi Sadhasivan, Dahmane Dahmani +2 more | 1998-08-11 |
| 5708849 | Implementing scatter/gather operations in a direct memory access device on a personal computer | Ajay V. Bhatt, Stan Graham, David D. Lent | 1998-01-13 |
| 5455915 | Computer system with bridge circuitry having input/output multiplexers and third direct unidirectional path for data transfer between buses operating at different rates | — | 1995-10-03 |