SR

Scott Dion Rodgers

IN Intel: 84 patents #279 of 30,777Top 1%
Overall (All Time): #20,618 of 4,157,543Top 1%
84
Patents All Time

Issued Patents All Time

Showing 25 most recent of 84 patents

Patent #TitleCo-InventorsDate
11683310 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Asit K. Mallick, Adriaan Van De Ven 2023-06-20
11615031 Memory management apparatus and method for managing different page tables for different privilege levels Robert S. Chappell, Barry E. Huntley 2023-03-28
11144472 Memory management apparatus and method for managing different page tables for different privilege levels Robert S. Chappell, Barry E. Huntley 2021-10-12
11019061 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Asit K. Mallick, Adriaan Van De Ven 2021-05-25
10999284 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Asit K. Mallick, Adriaan Van De Ven 2021-05-04
10901772 Virtualization exceptions Gilbert Neiger, Mayank Bomb, Manohar R. Castelino, Robert S. Chappell, David M. Durham +5 more 2021-01-26
10747682 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Rajesh M. Sankaran +2 more 2020-08-18
10592421 Instructions and logic to provide advanced paging capabilities for secure enclave page caches Carlos V. Rozas, Ilya Alexandrovich, Ittai Anati, Alex Berenzon, Michael A. Goldsmith +12 more 2020-03-17
10503662 Systems, apparatuses, and methods for implementing temporary escalated privilege Martin G. Dixon, Gilbert Neiger, Robert S. Chappell, Barry E. Huntley 2019-12-10
10452403 Mechanism for instruction set based thread execution on a plurality of instruction sequencers Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more 2019-10-22
10296366 Virtualization exceptions Gilbert Neiger, Mayank Bomb, Manohar R. Castelino, Robert S. Chappell, David M. Durham +5 more 2019-05-21
10180911 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Rajesh M. Sankaran +2 more 2019-01-15
10135825 Protecting supervisor mode information Barry E. Huntley, Gilbert Neiger, H. Peter Anvin, Asit K. Mallick, Adriaan Van De Ven 2018-11-20
10114767 Virtualizing physical memory in a virtual machine system using a hierarchy of extended page tables to translate guest-physical addresses to host-physical addresses Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Rajesh Madukkarumukumana, Richard UhligQ +1 more 2018-10-30
9990206 Mechanism for instruction set based thread execution of a plurality of instruction sequencers Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more 2018-06-05
9971615 Optimizing processor-managed resources based on the behavior of a virtual machine monitor Steven M. Bennett, Andrew V. Anderson, Stalinselvaraj Jeyasingh, Alain Kagi, Gilbert Neiger +3 more 2018-05-15
9720697 Mechanism for instruction set based thread execution on a plurality of instruction sequencers Hong Wang, John Shen, Ed Grochowski, James P. Held, Bryant Bigbee +9 more 2017-08-01
9678890 Synchronizing a translation lookaside buffer with an extended paging table Steven M. Bennett, Andrew V. Anderson, Gilbert Neiger, Richard Uhlig, Rajesh M. Sankaran +2 more 2017-06-13
9563455 Virtualization exceptions Gilbert Neiger, Mayank Bomb, Manohar R. Castelino, Robert S. Chappell, David M. Durham +5 more 2017-02-07
9535838 Atomic operations in PCI express Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more 2017-01-03
9537738 Reporting platform information using a secure agent Brian Delgado, Brian Spencer Payne, Barry E. Huntley 2017-01-03
9442855 Transaction layer packet formatting Jasmin Ajanovic, Mahesh Wagh, Prashant Sethi, Debendra Das Sharma, David J. Harriman +13 more 2016-09-13
9430384 Instructions and logic to provide advanced paging capabilities for secure enclave page caches Carlos V. Rozas, Ilya Alexandrovich, Ittai Anati, Alex Berenzon, Michael A. Goldsmith +12 more 2016-08-30
9405937 Method and apparatus for securing a dynamic binary translation system Lior Malka, Koichi Yamada, Palanivelrajan Rajan Shanmugavelayutham, Barry E. Huntley, James D. Beaney, Jr. 2016-08-02
9405551 Creating an isolated execution environment in a co-designed processor Koichi Yamada, Palanivel Rajan Shanmugavelayutham, Barry E. Huntley, James D. Beaney, Jr., Boaz Tamir 2016-08-02