RC

Robert S. Chappell

IN Intel: 39 patents #894 of 30,777Top 3%
Overall (All Time): #80,939 of 4,157,543Top 2%
39
Patents All Time

Issued Patents All Time

Showing 25 most recent of 39 patents

Patent #TitleCo-InventorsDate
12340224 Systems, methods, and apparatuses to control CPU speculation for the prevention of side-channel attacks Jason W. Brandt, Alan Cox, Asit K. Mallick, Joseph Nuzman, Arjan Van De Ven 2025-06-24
12236243 Apparatuses and methods for speculative execution side channel mitigation Jason W. Brandt, Deepak Gupta, Rodrigo Branco, Joseph Nuzman, Sergiu D. Ghetie +11 more 2025-02-25
12130915 Microarchitectural mechanisms for the prevention of side-channel attacks using a thread identification (TID) and a privilege level bit Jared W. Stark, IV, Joseph Nuzman, Stephen J. Robinson, Jason W. Brandt 2024-10-29
12130740 Apparatuses and methods for a processor architecture Jason W. Brandt, Jesus Corbal, Edward T. Grochowski, Stephen H. Gunther, Buford M. Guy +9 more 2024-10-29
11675594 Systems, methods, and apparatuses to control CPU speculation for the prevention of side-channel attacks Jason W. Brandt, Alan Cox, Asit K. Mallick, Joseph Nuzman, Arjan Van De Ven 2023-06-13
11635965 Apparatuses and methods for speculative execution side channel mitigation Jason W. Brandt, Deepak Gupta, Rodrigo Branco, Joseph Nuzman, Sergiu D. Ghetie +11 more 2023-04-25
11615031 Memory management apparatus and method for managing different page tables for different privilege levels Scott Dion Rodgers, Barry E. Huntley 2023-03-28
11327754 Method and apparatus for approximation using polynomials Jorge Parra, Dan Baum, Michael Espig, Varghese George, Alexander Heinecke +5 more 2022-05-10
11294809 Apparatuses and methods for a processor architecture Jason W. Brandt, Jesus Corbal, Edward T. Grochowski, Stephen H. Gunther, Buford M. Guy +9 more 2022-04-05
11238155 Microarchitectural mechanisms for the prevention of side-channel attacks Jared W. Stark, IV, Joseph Nuzman, Stephen J. Robinson, Jason W. Brandt 2022-02-01
11144472 Memory management apparatus and method for managing different page tables for different privilege levels Scott Dion Rodgers, Barry E. Huntley 2021-10-12
11126438 System, apparatus and method for a hybrid reservation station for a processor Srikanth Srinivasan, Thomas Mullins, Ammon Christiansen, James Hadley, Sean P. Mirkes 2021-09-21
11106599 System and method for replacement in associative memories using weighted PLRU trees Chunhui Zhang, Yury N. Ilin 2021-08-31
10901772 Virtualization exceptions Gilbert Neiger, Mayank Bomb, Manohar R. Castelino, David M. Durham, Barry E. Huntley +5 more 2021-01-26
10719355 Criticality based port scheduling Pooja Roy, Jayesh Gaur, Sreenivas Subramoney, Zeev Sperber, Alexandr Titov +5 more 2020-07-21
10678712 Method and apparatus for bus lock assistance John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parthasarathy, David William Burns 2020-06-09
10503662 Systems, apparatuses, and methods for implementing temporary escalated privilege Martin G. Dixon, Gilbert Neiger, Scott Dion Rodgers, Barry E. Huntley 2019-12-10
10409611 Apparatus and method for transactional memory and lock elision including abort and end instructions to abort or commit speculative execution Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10
10409612 Apparatus and method for transactional memory and lock elision including an abort instruction to abort speculative execution Martin G. Dixon, Ravi Rajwar, Konrad K. Lai, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10
10296366 Virtualization exceptions Gilbert Neiger, Mayank Bomb, Manohar R. Castelino, David M. Durham, Barry E. Huntley +5 more 2019-05-21
10282296 Zeroing a cache line Jason W. Brandt, Jesus Corbal, Edward T. Grochowski, Stephen H. Gunther, Buford M. Guy +5 more 2019-05-07
10216650 Method and apparatus for bus lock assistance John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parthasarathy, David William Burns 2019-02-26
10031847 System and method for replacement in associative memories using weighted PLRU trees Chunhui Zhang, Yury N. Ilin 2018-07-24
9880948 Method and apparatus for bus lock assistance John W. Faistl, Hermann W. Gartler, Michael D. Tucknott, Rajesh S. Parthasarathy, David William Burns 2018-01-30
9740484 Processor-based apparatus and method for processing bit streams using bit-oriented instructions through byte-oriented storage Vinodh Gopal, James D. Guilford, Gilbert M. Wolrich, Erdinc Ozturk, Wajdi K. Feghali +3 more 2017-08-22