Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Ravi Rajwar — 49 Patents

Intel: 44 patents #779 of 30,777Top 3%
WARF: 5 patents #366 of 4,123Top 9%
Portland, OR: #351 of 9,213 inventorsTop 4%
Oregon: #716 of 28,073 inventorsTop 3%
Overall (All Time): #55,592 of 4,157,543Top 2%
49 Patents All Time
Ravi Rajwar has been granted 49 US patents while listed as an inventor at Intel. The first was granted in 2002 and the most recent in September 2019. Ravi Rajwar ranks #55,592 of 4,157,543 US inventors in our database (top 1.3%). Patent records list Ravi Rajwar in Portland, OR, US.

Issued Patents All Time

Showing 1–25 of 49 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10409612 Apparatus and method for transactional memory and lock elision including an abort instruction to abort speculative execution Martin G. Dixon, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10 $24,704,000
10409611 Apparatus and method for transactional memory and lock elision including abort and end instructions to abort or commit speculative execution Martin G. Dixon, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10 $24,704,000
10331452 Tracking mode of a processing device in instruction tracing systems Thilo Schmitt, Peter Lachner, Beeman C. Strong, Ofer Levy, Thomas Toll +3 more 2019-06-25 $17,766,000
10261879 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-04-16 $24,207,000
10248524 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-04-02 $26,887,000
10241952 Throttling integrated link Robert Mayer, Stephan Jourdan, Lily P. Looi 2019-03-26 $18,583,000
10223227 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-03-05 $19,977,000
10210065 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-02-19 $27,334,000
10210066 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-02-19 $27,334,000
10152401 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2018-12-11 $24,515,000
10146538 Suspendable load address tracking inside transactions Raanan Sade, Roman Dementiev, Ady Tal, Alex Gerber 2018-12-04 $23,085,000
10073719 Last branch record indicators for transactional memory Peter Lachner, Laura A. Knauth, Konrad K. Lai 2018-09-11 $19,778,000
9798590 Post-retire scheme for tracking tentative accesses during transactional execution Haitham Akkary, Srikanth Srinivasan 2017-10-24 $10,797,000
9665373 Protecting confidential data with transactional processing in execute-only memory Michael LeMay, David M. Durham, Barry E. Huntley, Vedvyas Shanbhogue, Ravi L. Sahita 2017-05-30 $12,187,000
9535744 Method and apparatus for continued retirement during commit of a speculative region of code Matthew C. Merten, Christine E. Wang, Vijaykumar B. Kadgi, Rajesh S. Parthasarathy 2017-01-03 $8,191,000
9529645 Methods and apparatus to manage speculative execution of object locks by diverting the speculative execution of target code Suresh Srinivas, Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Konrad K. Lai 2016-12-27 $11,980,000
9411739 System, method and apparatus for improving transactional memory (TM) throughput using TM region indicators Omar M. Shaikh, Paul Caprioli, Muawya M. Al-Otoom 2016-08-09 $12,367,000
9372764 Event counter checkpointing and restoring Laura A. Knauth, Konrad K. Lai, Martin G. Dixon, Peggy J. Irelan 2016-06-21 $13,200,000
9354878 Last branch record register for storing taken branch information and transactional memory transaction indicator to be used in transaction execution analysis Peter Lachner, Laura A. Knauth, Konrad K. Lai 2016-05-31 $9,993,000
9311241 Method and apparatus to write modified cache data to a backing store while retaining write permissions Robert S. Chappell, Zhongying Zhang, Jason Anthony Bessette 2016-04-12 $10,096,000
9298632 Hybrid cache state and filter tracking of memory operations during a transaction Robert S. Chappell, Zhongying Zhang, Jason Anthony Bessette 2016-03-29 $14,056,000
9268596 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2016-02-23 $10,383,000
9262173 Critical section detection and prediction mechanism for hardware lock elision Haitham Akkary, Srikanth Srinivasan 2016-02-16 $10,295,000
9182986 Copy-on-write buffer for restoring program code from a speculative region to a non-speculative region David Sung-Eun Lim, James Hadley, Matthew C. Merten, Joseph A. McMahon, Yury N. Ilin +1 more 2015-11-10 $14,197,000
9146610 Throttling integrated link Robert Mayer, Stephan Jourdan, Lily P. Looi 2015-09-29 $22,047,000