RR

Ravi Rajwar

IN Intel: 44 patents #769 of 30,777Top 3%
WARF: 5 patents #366 of 4,123Top 9%
Overall (All Time): #56,598 of 4,157,543Top 2%
49
Patents All Time

Issued Patents All Time

Showing 25 most recent of 49 patents

Patent #TitleCo-InventorsDate
10409612 Apparatus and method for transactional memory and lock elision including an abort instruction to abort speculative execution Martin G. Dixon, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10
10409611 Apparatus and method for transactional memory and lock elision including abort and end instructions to abort or commit speculative execution Martin G. Dixon, Konrad K. Lai, Robert S. Chappell, Rajesh S. Parthasarathy, Alexandre J. Farcy +4 more 2019-09-10
10331452 Tracking mode of a processing device in instruction tracing systems Thilo Schmitt, Peter Lachner, Beeman C. Strong, Ofer Levy, Thomas Toll +3 more 2019-06-25
10261879 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-04-16
10248524 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-04-02
10241952 Throttling integrated link Robert Mayer, Stephan Jourdan, Lily P. Looi 2019-03-26
10223227 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-03-05
10210065 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-02-19
10210066 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2019-02-19
10152401 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2018-12-11
10146538 Suspendable load address tracking inside transactions Raanan Sade, Roman Dementiev, Ady Tal, Alex Gerber 2018-12-04
10073719 Last branch record indicators for transactional memory Peter Lachner, Laura A. Knauth, Konrad K. Lai 2018-09-11
9798590 Post-retire scheme for tracking tentative accesses during transactional execution Haitham Akkary, Srikanth Srinivasan 2017-10-24
9665373 Protecting confidential data with transactional processing in execute-only memory Michael LeMay, David M. Durham, Barry E. Huntley, Vedvyas Shanbhogue, Ravi L. Sahita 2017-05-30
9535744 Method and apparatus for continued retirement during commit of a speculative region of code Matthew C. Merten, Christine E. Wang, Vijaykumar B. Kadgi, Rajesh S. Parthasarathy 2017-01-03
9529645 Methods and apparatus to manage speculative execution of object locks by diverting the speculative execution of target code Suresh Srinivas, Stephen H. Dohrmann, Mingqiu Sun, Uma Srinivasan, Konrad K. Lai 2016-12-27
9411739 System, method and apparatus for improving transactional memory (TM) throughput using TM region indicators Omar M. Shaikh, Paul Caprioli, Muawya M. Al-Otoom 2016-08-09
9372764 Event counter checkpointing and restoring Laura A. Knauth, Konrad K. Lai, Martin G. Dixon, Peggy J. Irelan 2016-06-21
9354878 Last branch record register for storing taken branch information and transactional memory transaction indicator to be used in transaction execution analysis Peter Lachner, Laura A. Knauth, Konrad K. Lai 2016-05-31
9311241 Method and apparatus to write modified cache data to a backing store while retaining write permissions Robert S. Chappell, Zhongying Zhang, Jason Anthony Bessette 2016-04-12
9298632 Hybrid cache state and filter tracking of memory operations during a transaction Robert S. Chappell, Zhongying Zhang, Jason Anthony Bessette 2016-03-29
9268596 Instruction and logic to test transactional execution status Bret L. Toll, Konrad K. Lai, Matthew C. Merten, Martin G. Dixon 2016-02-23
9262173 Critical section detection and prediction mechanism for hardware lock elision Haitham Akkary, Srikanth Srinivasan 2016-02-16
9182986 Copy-on-write buffer for restoring program code from a speculative region to a non-speculative region David Sung-Eun Lim, James Hadley, Matthew C. Merten, Joseph A. McMahon, Yury N. Ilin +1 more 2015-11-10
9146610 Throttling integrated link Robert Mayer, Stephan Jourdan, Lily P. Looi 2015-09-29