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Method and logic for maintaining performance counters with dynamic frequencies |
Ahmad Yasin, Eti Pardo-Fridman |
2020-10-06 |
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Branch type logging in last branch registers |
Michael W. Chynoweth, Jonathan D. Combs, Joseph K. Olivas, Beeman C. Strong, Rajshree Chabukswar +5 more |
2020-03-17 |
| 10467011 |
Thread pause processors, methods, systems, and instructions |
Lihu Rappoport, Zeev Sperber, Michael Mishaeli, Stanislav Shwartsman, Lev Makovsky +1 more |
2019-11-05 |
| 10437990 |
Detection of return oriented programming attacks in a processor |
Yuriy Bulygin, Gideon Gerzon, Sameer Desai, Hisham Shafi, Andrew A. Furtak +3 more |
2019-10-08 |
| 10331452 |
Tracking mode of a processing device in instruction tracing systems |
Thilo Schmitt, Peter Lachner, Beeman C. Strong, Thomas Toll, Matthew C. Merten +3 more |
2019-06-25 |
| 10152451 |
Scatter using index array and finite state machine |
Zeev Sperber, Robert Valentine, Shlomo Raikin, Stanislav Shwartsman, Gal Ofir +2 more |
2018-12-11 |
| 9971603 |
Causing an interrupt based on event count |
Ahmad Yasin, Peggy J. Irelan, Emile Ziedan, Grant G. Zhou |
2018-05-15 |
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Execution profiling mechanism |
Ravi L. Sahita, Xiaoning Li, Barry E. Huntley, Vedvyas Shanbhogue, Yuriy Bulygin +3 more |
2018-01-02 |
| 9716646 |
Using thresholds to gate timing packet generation in a tracing system |
Tsvika Kurts, Beeman C. Strong, Gabi Malka, Zeev Sperber |
2017-07-25 |
| 9696997 |
Real time instruction trace processors, methods, and systems |
Tsvika Kurts, Itamar Kazachinsky, Gabi Malka, Zeev Sperber, Jason W. Brandt |
2017-07-04 |
| 9690588 |
Elapsed cycle timer in last branch records |
Ahmad Yasin, Michael W. Chynoweth, Jason W. Brandt, Angela D. Schmid |
2017-06-27 |
| 9660799 |
Changing the clock frequency of a computing device |
Alexander Gendler, Ernest Knoll, Ofer Nathan, Michael Mishaeli, Krishnakanth V. Sistla +4 more |
2017-05-23 |
| 9626274 |
Instruction and logic for tracking access to monitored regions |
Ahmad Yasin, Rajshree Chabukswar, Michael W. Chynoweth, Charlie J. Hewett |
2017-04-18 |
| 9612938 |
Providing status of a processing device with periodic synchronization point in instruction tracing system |
Frank Binns, Matthew C. Merten, Mayank Bomb, Beeman C. Strong, Peter Lachner +3 more |
2017-04-04 |
| 9575766 |
Causing an interrupt based on event count |
Ahmad Yasin, Peggy J. Irelan, Emile Ziedan, Grant G. Zhou |
2017-02-21 |
| 9342433 |
Elapsed cycle timer in last branch records |
Ahmad Yasin, Michael W. Chynoweth, Jason W. Brandt, Angela D. Schmid |
2016-05-17 |
| 9262163 |
Real time instruction trace processors, methods, and systems |
Tsvika Kurts, Itamar Kazachinsky, Gabi Malka, Zeev Sperber, Jason W. Brandt |
2016-02-16 |
| 8909988 |
Recoverable parity and residue error |
Zeev Sperber, Michael Mishaeli, Ron Gabor |
2014-12-09 |
| 7921280 |
Selectively powered retirement unit using a partitioned allocation array and a partitioned writeback array |
Zeev Sperber, Rafi Marom |
2011-04-05 |
| 6299629 |
Automatic tourniquet system |
Frank Vincenz Jonas Gruenfeld, Alexander Opatowsky, Joel Engel, Yehouda David |
2001-10-09 |
| 5842996 |
Automatic tourniquet system |
Frank Vincenz Jonas Gruenfeld, Alexander Opatowsky, Joel Engel, Yehouda David |
1998-12-01 |