Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12423103 | Instruction decode cluster offlining | Martin Licht | 2025-09-23 |
| 12353881 | Circuitry and methods for power efficient generation of length markers for a variable length instruction set | Thomas Madaelil, Khary J. Alexander, Martin Licht, Vikash Agarwal | 2025-07-08 |
| 12288072 | Methods, systems, and apparatuses for precise last branch record event logging | Michael W. Chynoweth, Beeman C. Strong, Charlie J. Hewett, Patrick Konsor, Vidisha Chirra +2 more | 2025-04-29 |
| 12254319 | Scalable toggle point control circuitry for a clustered decode pipeline | Sundararajan Ramakrishnan, Martin Licht, Santhosh Srinath | 2025-03-18 |
| 12229034 | Device, system and method for identifying a source of latency in pipeline circuitry | Jason W. Brandt | 2025-02-18 |
| 12190157 | Methods, systems, and apparatuses for scalable port-binding for asymmetric execution ports and allocation widths of a processor | Daeho Seo, Vikash Agarwal, John M. Esper, Khary J. Alexander, Asavari Paranjape | 2025-01-07 |
| 12093694 | Device, method and system for provisioning a real branch instruction and a fake branch instruction to respective decoders | Mathew Lowes, Martin Licht | 2024-09-17 |
| 11907712 | Methods, systems, and apparatuses for out-of-order access to a shared microcode sequencer by a clustered decode pipeline | Thomas Madaelil, Vikash Agarwal | 2024-02-20 |
| 10592244 | Branch type logging in last branch registers | Michael W. Chynoweth, Joseph K. Olivas, Beeman C. Strong, Rajshree Chabukswar, Ahmad Yasin +5 more | 2020-03-17 |
| 10579492 | Device, system and method for identifying a source of latency in pipeline circuitry | Jason W. Brandt | 2020-03-03 |
| 10417001 | Physical register table for eliminating move instructions | Venkateswara Madduri | 2019-09-17 |
| 10365988 | Monitoring performance of a processing device to manage non-precise events | Michael W. Chynoweth, Jason W. Brandt, Corey D. Gough | 2019-07-30 |
| 10331454 | System and method for load balancing in out-of-order clustered decoding | — | 2019-06-25 |
| 10067762 | Apparatuses, methods, and systems for memory disambiguation | Vikash Agarwal, Christopher D. Bryant, Stephen J. Robinson | 2018-09-04 |
| 9811338 | Flag non-modification extension for ISA instructions using prefixes | Jason W. Brandt, Robert Valentine | 2017-11-07 |
| 9804852 | Conditional execution support for ISA instructions using prefixes | Jason W. Brandt, Robert Valentine, Kevin B. Smith, Zia Ansari, Maxim Loktyukhin | 2017-10-31 |
| 9766999 | Monitoring performance of a processing device to manage non-precise events | Michael W. Chynoweth, Jason W. Brandt, Corey D. Gough | 2017-09-19 |
| 9703566 | Sharing TLB mappings between contexts | Jason W. Brandt, Benjamin Crawford Chaffin, Julio Gago, Andrew F. Glew | 2017-07-11 |
| 9465680 | Method and apparatus for processor performance monitoring | Michael W. Chynoweth, Angela D. Schmid, Kimberly C. Weier, Ahmad Yasin, Jason W. Brandt +3 more | 2016-10-11 |
| 9454371 | Micro-architecture for eliminating MOV operations | Venkateswara Madduri, James E. Phillips, Stephen J. Robinson, James D. Allen, IV, Jonathan J. Tyler | 2016-09-27 |
| 9367317 | Loop streaming detector for standard and complex instruction types | Jonathan Y. Tong | 2016-06-14 |
| 9329865 | Context control and parameter passing within microcode based instruction routines | Kameswar Subramaniam, Jeffrey G. Wiedemeier | 2016-05-03 |
| 9098284 | Method and apparatus for saving power by efficiently disabling ways for a set-associative cache | Martin Licht, Andrew Shane Huang | 2015-08-04 |
| 8904112 | Method and apparatus for saving power by efficiently disabling ways for a set-associative cache | Martin Licht, Andrew Shane Huang | 2014-12-02 |
| 8832419 | Enhanced microcode address stack pointer manipulation | Kameswar Subramaniam | 2014-09-09 |