CB

Christopher D. Bryant

IN Intel: 12 patents #3,417 of 30,777Top 15%
AM AMD: 5 patents #2,159 of 9,279Top 25%
AT AT&T: 5 patents #3,608 of 18,772Top 20%
Motorola: 2 patents #4,475 of 12,470Top 40%
NS National Semiconductor: 1 patents #1,247 of 2,238Top 60%
Overall (All Time): #160,832 of 4,157,543Top 4%
25
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12007938 Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width Vedvyas Shanbhogue, Stephen J. Robinson, Jason W. Brandt 2024-06-11
11822486 Pipelined out of order page miss handler 2023-11-21
11658969 Apparatuses and methods for facilitating port discernment driven mutual authentication and service access authorization Timothy Yao, Qun Wei 2023-05-23
11347680 Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width Vedvyas Shanbhogue, Stephen J. Robinson, Jason W. Brandt 2022-05-31
10901940 Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width Vedvyas Shanbhogue, Stephen J. Robinson, Jason W. Brandt 2021-01-26
10470099 System and method for short message delivery in a mobility network Rajendra Prasad Kodaypak, Ryan Redfern, Jiansong Wang 2019-11-05
10255196 Method and apparatus for sub-page write protection Vedvyas Shanbhogue, Jeff Wiedemeier 2019-04-09
10219198 System and method for short message delivery in a mobility network Rajendra Prasad Kodaypak, Ryan Redfern, Jiansong Wang 2019-02-26
10067762 Apparatuses, methods, and systems for memory disambiguation Vikash Agarwal, Jonathan D. Combs, Stephen J. Robinson 2018-09-04
9921967 Multi-core shared page miss handler Rama S. Gopal 2018-03-20
9921968 Multi-core shared page miss handler Rama S. Gopal 2018-03-20
9892056 Multi-core shared page miss handler Rama S. Gopal 2018-02-13
9892059 Multi-core shared page miss handler Rama S. Gopal 2018-02-13
9875187 Interruption of a page miss handler Stephen J. Robinson 2018-01-23
9684605 Translation lookaside buffer for guest physical addresses in a virtual machine Vedvyas Shanbhogue 2017-06-20
8769539 Scheduling scheme for load/store operations Daniel Hopper, Suzanne Plummer 2014-07-01
8713263 Out-of-order load/store queue structure 2014-04-29
8645588 Pipelined serial ring bus David A. Kaplan 2014-02-04
8594681 Intelligent routing of communications to an international number in a messaging service Matthew James Bailey, William Rosenberg 2013-11-26
8447309 Intelligent routing of communications to an international number in a messaging service Matthew James Bailey, William Rosenberg 2013-05-21
8341316 Method and apparatus for controlling a translation lookaside buffer David A. Kaplan, Stephen P. Thompson 2012-12-25
6799280 System and method for synchronizing data transfer from one domain to another by selecting output data from either a first or second storage device Robin W. Edenfield 2004-09-28
6535946 Low-latency circuit for synchronizing data transfers between clock domains derived from a common clock Robin W. Edenfield 2003-03-18
5627975 Interbus buffer for use between a pseudo little endian bus and a true little endian bus Brian K. Reynolds 1997-05-06
5392434 Arbitration protocol system granting use of a shared resource to one of a plurality of resource users Lawrence Joseph Merkel 1995-02-21