| 12130915 |
Microarchitectural mechanisms for the prevention of side-channel attacks using a thread identification (TID) and a privilege level bit |
Robert S. Chappell, Jared W. Stark, IV, Joseph Nuzman, Jason W. Brandt |
2024-10-29 |
| 12032485 |
64-bit virtual addresses having metadata bit(s) and canonicality check that does not fail due to non-canonical values of metadata bit(s) |
Vedvyas Shanbhogue, Gilbert Neiger, Dan Baum, Ron Gabor |
2024-07-09 |
| 12007938 |
Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width |
Vedvyas Shanbhogue, Christopher D. Bryant, Jason W. Brandt |
2024-06-11 |
| 11500636 |
Spatial and temporal merging of remote atomic operations |
Christopher J. Hughes, Joseph Nuzman, Jonas Svennebring, Doddaballapur N. Jayasimha, Samantika S. Sury +4 more |
2022-11-15 |
| 11347680 |
Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width |
Vedvyas Shanbhogue, Christopher D. Bryant, Jason W. Brandt |
2022-05-31 |
| 11238155 |
Microarchitectural mechanisms for the prevention of side-channel attacks |
Robert S. Chappell, Jared W. Stark, IV, Joseph Nuzman, Jason W. Brandt |
2022-02-01 |
| 10901940 |
Processors, methods, systems, and instructions to atomically store to memory data wider than a natively supported data width |
Vedvyas Shanbhogue, Christopher D. Bryant, Jason W. Brandt |
2021-01-26 |
| 10572260 |
Spatial and temporal merging of remote atomic operations |
Christopher J. Hughes, Joseph Nuzman, Jonas Svennebring, Doddaballapur N. Jayasimha, Samantika S. Sury +4 more |
2020-02-25 |
| 10067762 |
Apparatuses, methods, and systems for memory disambiguation |
Vikash Agarwal, Christopher D. Bryant, Jonathan D. Combs |
2018-09-04 |
| 9996487 |
Coherent fabric interconnect for use in multiple topologies |
Jose Niell, Daniel F. Cutter, Mukesh Patel |
2018-06-12 |
| 9875187 |
Interruption of a page miss handler |
Christopher D. Bryant |
2018-01-23 |
| 9785576 |
Hardware-assisted virtualization for implementing secure video output path |
Thiam Wah Loh, Per Hammarlund, Andreas Wasserbauer, Swee Chong Peter Kuan, Eckhard Delfs +6 more |
2017-10-10 |
| 9632907 |
Tracking deferred data packets in a debug trace architecture |
Beeman C. Strong, Jason W. Brandt, Peter Lachner |
2017-04-25 |
| 9619412 |
Enabling virtualization of a processor resource |
Vedvyas Shanbhogue |
2017-04-11 |
| 9454371 |
Micro-architecture for eliminating MOV operations |
Venkateswara Madduri, Jonathan D. Combs, James E. Phillips, James D. Allen, IV, Jonathan J. Tyler |
2016-09-27 |
| 9189360 |
Processor that records tracing data in non contiguous system memory slices |
Beeman C. Strong, Jason W. Brandt, Tsvika Kurts, Peter Lachner, Itamar Kazachinsky +1 more |
2015-11-17 |
| 9141570 |
Enabling virtualization of a processor resource |
Vedvyas Shanbhogue |
2015-09-22 |
| 8533721 |
Method and system of scheduling out-of-order operations without the requirement to execute compare, ready and pick logic in a single cycle |
Deepak Limaye |
2013-09-10 |
| 5812091 |
Radio interferometric antenna for angle coding |
— |
1998-09-22 |