RG

Ron Gabor

IN Intel: 63 patents #448 of 30,777Top 2%
Overall (All Time): #35,679 of 4,157,543Top 1%
63
Patents All Time

Issued Patents All Time

Showing 25 most recent of 63 patents

Patent #TitleCo-InventorsDate
12045176 Memory protection with hidden inline metadata David M. Durham 2024-07-23
12032485 64-bit virtual addresses having metadata bit(s) and canonicality check that does not fail due to non-canonical values of metadata bit(s) Vedvyas Shanbhogue, Gilbert Neiger, Stephen J. Robinson, Dan Baum 2024-07-09
11966334 Apparatuses, methods, and systems for selective linear address masking based on processor privilege level and control register bits Igor Yanover 2024-04-23
11693785 Memory tagging apparatus and method Enrico Perla, Raanan Sade, Igor Yanover, Tomer Stark, Joseph Nuzman 2023-07-04
11681533 Restricted speculative execution mode to prevent observable side effects Alaa R. Alameldeen, Abhishek Basak, Fangfei Liu, Francis X. McKeen, Joseph Nuzman +3 more 2023-06-20
11656998 Memory tagging metadata manipulation Enrico Perla, Raanan Sade, Igor Yanover, Tomer Stark 2023-05-23
11645135 Hardware apparatuses and methods for memory corruption detection Tomer Stark, Joseph Nuzman, Raanan Sade, Bryant Bigbee 2023-05-09
11636049 Memory protection with hidden inline metadata David M. Durham 2023-04-25
11392503 Memory tagging apparatus and method Raanan Sade, Igor Yanover, Assaf Zaltsman, Tomer Stark 2022-07-19
11288213 Memory protection with hidden inline metadata David M. Durham 2022-03-29
11068339 Read from memory instructions, processors, methods, and systems, that do not take exception on defective data Ashok Raj, Hisham Shafi, Sergiu D. Ghetie, Mohan J. Kumar, Theodros Yigzaw +2 more 2021-07-20
11030030 Enhanced address space layout randomization Tomer Stark, Joseph Nuzman 2021-06-08
10976961 Device, system and method to detect an uninitialized memory read Tomer Stark, Joseph Nuzman, Ady Tal 2021-04-13
10891230 Apparatuses, methods, and systems for selective linear address masking based on processor privilege level and control register bits Igor Yanover 2021-01-12
10877897 System, apparatus and method for multi-cacheline small object memory tagging David M. Durham, Rajat Agarwal 2020-12-29
10802567 Performing local power gating in a processor Nadav Bonen, Zeev Sperber, Vjekoslav Svilan, David N. Mackintosh, Jose A. Baiocchi Paredes +2 more 2020-10-13
10776190 Hardware apparatuses and methods for memory corruption detection Tomer Stark, Joseph Nuzman, Raanan Sade, Bryant Bigbee 2020-09-15
10725849 Server RAS leveraging multi-key encryption David M. Durham, Siddhartha Chhabra, Kai Cong 2020-07-28
10725788 Advanced error detection for integer single instruction, multiple data (SIMD) arithmetic operations Jose Yallouz, Arkady Bramnik 2020-07-28
10725755 Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads David J. Sager, Ruchira Sasanka, Shlomo Raikin, Joseph Nuzman, Leeor Peled +10 more 2020-07-28
10649783 Multicore system for fusing instructions queued during a dynamically adjustable time window Ido Ouziel, Lihu Rappoport, Robert Valentine, Pankaj Raghuvanshi 2020-05-12
10585741 Heap management for memory corruption detection Tomer Stark, Ady Tal 2020-03-10
10521361 Memory write protection for memory corruption detection architectures Tomer Stark, Ady Tal, Joseph Nuzman 2019-12-31
10346171 End-to end transmission of redundant bits for physical storage location identifiers between first and second register rename storage structures Yiannakis Sazeides, Arkady Bramnik 2019-07-09
10324857 Linear memory address transformation and management Joseph Nuzman, Raanan Sade, Igor Yanover, Amit Gradstein 2019-06-18