Issued Patents All Time
Showing 26–50 of 63 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10319458 | Hardware apparatuses and methods to check data storage devices for transient faults | Ashok Raj, Hisham Shafi, Mohan J. Kumar, Theodros Yigzaw | 2019-06-11 |
| 10296416 | Read from memory instructions, processors, methods, and systems, that do not take exception on defective data | Ashok Raj, Hisham Shafi, Sergiu D. Ghetie, Mohan J. Kumar, Theodros Yigzaw +2 more | 2019-05-21 |
| 10191791 | Enhanced address space layout randomization | Tomer Stark, Joseph Nuzman | 2019-01-29 |
| 10162694 | Hardware apparatuses and methods for memory corruption detection | Tomer Stark, Joseph Nuzman, Raanan Sade, Bryant Bigbee | 2018-12-25 |
| 10156884 | Local power gate (LPG) interfaces for power-aware operations | Michael Mishaeli, Robert Valentine, Alex Gerber, Zeev Sperber | 2018-12-18 |
| 10133620 | Detecting errors in register renaming by comparing value representing complete error free set of identifiers and value representing identifiers in register rename unit | Alex Gerber, Yiannakis Sazeides, Arkady Bramnik | 2018-11-20 |
| 10095573 | Byte level granularity buffer overflow detection for memory corruption detection architectures | Tomer Stark, Ady Tal, Joseph Nuzman | 2018-10-09 |
| 10073727 | Heap management for memory corruption detection | Tomer Stark, Ady Tal | 2018-09-11 |
| 9934164 | Memory write protection for memory corruption detection architectures | Tomer Stark, Ady Tal, Joseph Nuzman | 2018-04-03 |
| 9904586 | Interfacing with block-based storage in a processor | Theodros Yigzaw, Mohan J. Kumar, Hisham Shafi, Ashok Raj | 2018-02-27 |
| 9858140 | Memory corruption detection | Raanan Sade, Joseph Nuzman | 2018-01-02 |
| 9772674 | Performing local power gating in a processor | Nadav Bonen, Zeev Sperber, Vjekoslav Svilan, David N. Mackintosh, Jose A. Baiocchi Paredes +2 more | 2017-09-26 |
| 9766968 | Byte level granularity buffer overflow detection for memory corruption detection architectures | Tomer Stark, Ady Tal, Joseph Nuzman | 2017-09-19 |
| 9690591 | System and method for fusing instructions queued during a time window defined by a delay counter | Ido Ouziel, Lihu Rappoport, Robert Valentine, Pankaj Raghuvanshi | 2017-06-27 |
| 9690640 | Recovery from multiple data errors | Raanan Sade, Deep Buch, Theodros Yigzaw, Stanislav Shwartsman | 2017-06-27 |
| 9672019 | Systems, apparatuses, and methods for a hardware and software system to automatically decompose a program to multiple parallel threads | David J. Sager, Ruchira Sasanka, Shlomo Raikin, Joseph Nuzman, Leeor Peled +10 more | 2017-06-06 |
| 9652375 | Multiple chunk support for memory corruption detection architectures | Tomer Stark, Joseph Nuzman | 2017-05-16 |
| 9619313 | Memory write protection for memory corruption detection architectures | Tomer Stark, Ady Tal, Joseph Nuzman | 2017-04-11 |
| 9595349 | Hardware apparatuses and methods to check data storage devices for transient faults | Ashok Raj, Hisham Shafi, Mohan J. Kumar, Theodros Yigzaw | 2017-03-14 |
| 9519324 | Local power gate (LPG) interfaces for power-aware operations | Michael Mishaeli, Robert Valentine, Alex Gerber, Zeev Sperber | 2016-12-13 |
| 9292362 | Method and apparatus to protect a processor against excessive power usage | Lev Makovsky, Zeev Sperber, Efraim Rotem, Nir Rosenzweig, Stanislav Shwartsman +4 more | 2016-03-22 |
| 9229524 | Performing local power gating in a processor | Nadav Bonen, Zeev Sperber, Vjekoslav Svilan, David N. Mackintosh, Jose Angel Paredes +2 more | 2016-01-05 |
| 9003421 | Acceleration threads on idle OS-visible thread execution units | Gad Sheaffer, Avi Mendelson, Uri Weiser, Hong Wang | 2015-04-07 |
| 8935514 | Optimizing performance of instructions based on sequence detection or information associated with the instructions | Ohad Falik, Lihu Rappoport, Yulia Kurolap, Michael Mishaeli | 2015-01-13 |
| 8909988 | Recoverable parity and residue error | Zeev Sperber, Ofer Levy, Michael Mishaeli | 2014-12-09 |