Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
BB

Bryant Bigbee — 47 Patents

Intel: 47 patents #700 of 30,777Top 3%
Scottsdale, AZ: #48 of 3,386 inventorsTop 2%
Arizona: #495 of 32,909 inventorsTop 2%
Overall (All Time): #59,703 of 4,157,543Top 2%
47 Patents All Time
Bryant Bigbee has been granted 47 US patents while listed as an inventor at Intel. The first was granted in 1999 and the most recent in May 2023. Bryant Bigbee ranks #59,703 of 4,157,543 US inventors in our database (top 1.4%). Patent records list Bryant Bigbee in Scottsdale, AZ, US.

Issued Patents All Time

Showing 1–25 of 47 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11645135 Hardware apparatuses and methods for memory corruption detection Tomer Stark, Ron Gabor, Joseph Nuzman, Raanan Sade 2023-05-09 $19,706,000
10776190 Hardware apparatuses and methods for memory corruption detection Tomer Stark, Ron Gabor, Joseph Nuzman, Raanan Sade 2020-09-15 $34,212,000
10452403 Mechanism for instruction set based thread execution on a plurality of instruction sequencers Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more 2019-10-22 $16,310,000
10275598 Providing a secure execution mode in a pre-boot environment Vincent J. Zimmer, Andrew J. Fish, Mark Doran 2019-04-30 $31,713,000
10162694 Hardware apparatuses and methods for memory corruption detection Tomer Stark, Ron Gabor, Joseph Nuzman, Raanan Sade 2018-12-25
9990206 Mechanism for instruction set based thread execution of a plurality of instruction sequencers Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more 2018-06-05 $24,427,000
9875102 Apparatus, system, and method for persistent user-level thread Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, John Shen +6 more 2018-01-23 $21,180,000
9766891 Apparatus, system, and method for persistent user-level thread Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, John Shen +6 more 2017-09-19 $8,005,000
9720697 Mechanism for instruction set based thread execution on a plurality of instruction sequencers Hong Wang, John Shen, Ed Grochowski, James P. Held, Shivnandan Kaushik +9 more 2017-08-01 $11,137,000
9588771 Instruction set architecture-based inter-sequencer communications with a heterogeneous resource Hong Wang, John Shen, Hong Jiang, Richard Hankins, Per Hammarlund +8 more 2017-03-07 $9,849,000
9459874 Instruction set architecture-based inter-sequencer communications with a heterogeneous resource Hong Wang, John Shen, Hong Jiang, Richard Hankins, Per Hammarlund +8 more 2016-10-04 $11,494,000
9448829 Hetergeneous processor apparatus and method Paolo Narvaez, Ganapati Srinivasa, Eugene Gorbatov, Dheeraj Subbareddy, Mishali Naik +10 more 2016-09-20 $10,814,000
9383997 Apparatus, system, and method for persistent user-level thread Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, John Shen +6 more 2016-07-05 $9,080,000
9069605 Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention Richard Hankins, Hong Wang, Gautham Chinya, Trung Diep, Shivnandan Kaushik +7 more 2015-06-30 $18,547,000
9063804 System to profile and optimize user software in a managed run-time environment Chris J. Newburn, Robert Knight, Robert Geva, Dion Rodgers, Xiang Zou +2 more 2015-06-23 $16,735,000
9026773 Providing a secure execution mode in a pre-boot environment Vincent J. Zimmer, Andrew J. Fish, Mark Doran 2015-05-05 $18,811,000
8914618 Instruction set architecture-based inter-sequencer communications with a heterogeneous resource Hong Wang, John Shen, Hong Jiang, Richard Hankins, Per Hammarlund +8 more 2014-12-16 $19,599,000
8887174 Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers Richard Hankins, Gautham Chinya, Hong Wang, Shivnandan Kaushik, John Shen +7 more 2014-11-11 $20,178,000
8762694 Programmable event-driven yield mechanism Xiang Zou, Hong Wang, Robert Knight, Robert Geva, Gautham Chinya +6 more 2014-06-24 $15,136,000
8719819 Mechanism for instruction set based thread execution on a plurality of instruction sequencers Hong Wang, John Shen, Ed Grochowski, James P. Held, Shivnandan Kaushik +9 more 2014-05-06 $12,959,000
8677163 Context state management for processor feature sets Don A. Van Dyke, Michael Mishaeli, Ittai Anati, Baiju V. Patel, Will Deutsch +7 more 2014-03-18 $15,232,000
8671275 Mechanism to handle events in a machine with isolated execution Francis X. McKeen, Lawrence O. Smith, Benjamin Crawford Chaffin, Michael Cornaby 2014-03-11 $38,969,000
8631261 Context state management for processor feature sets Don A. Van Dyke, Michael Mishaeli, Ittai Anati, Baiju V. Patel, Will Deutsch +7 more 2014-01-14 $22,721,000
8607235 Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention Richard Hankins, Hong Wang, Gautham Chinya, Trung Diep, Shivnandan Kaushik +7 more 2013-12-10 $14,665,000
8566567 System to profile and optimize user software in a managed run-time environment Chris J. Newburn, Robert Knight, Robert Geva, Dion Rodgers, Xiang Zou +2 more 2013-10-22 $17,912,000