Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8522044 | Mechanism to handle events in a machine with isolated execution | Francis X. McKeen, Lawrence O. Smith, Benjamin Crawford Chaffin, Michael Cornaby | 2013-08-27 |
| 8516483 | Transparent support for operating system services for a sequestered sequencer | Gautham Chinya, Hong Wang, Richard Hankins, Shivnandan Kaushik, John Shen +3 more | 2013-08-20 |
| 8479217 | Apparatus, system, and method for persistent user-level thread | Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, John Shen +6 more | 2013-07-02 |
| 8458464 | Mechanism to handle events in a machine with isolated execution | Francis X. McKeen, Lawrence O. Smith, Benjamin Crawford Chaffin, Michael Cornaby | 2013-06-04 |
| 8332619 | Primitives to enhance thread-level speculation | Quinn A. Jacobson, Hong Wang, John Shen, Gautham Chinya, Per Hammarlund +2 more | 2012-12-11 |
| 8301868 | System to profile and optimize user software in a managed run-time environment | Chris J. Newburn, Robert Knight, Robert Geva, Dion Rodgers, Xiang Zou +2 more | 2012-10-30 |
| 8171268 | Technique for context state management to reduce save and restore operations between a memory and a processor using in-use vectors | Chris J. Newburn, Dion Rodgers, Shivnandan Kaushik, Gautham Chinya, Xiang Zou +1 more | 2012-05-01 |
| 8028295 | Apparatus, system, and method for persistent user-level thread | Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, John Shen +6 more | 2011-09-27 |
| 8010969 | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | Richard Hankins, Gautham Chinya, Hong Wang, Shivnandan Kaushik, John Shen +7 more | 2011-08-30 |
| 7974416 | Providing a secure execution mode in a pre-boot environment | Vincent J. Zimmer, Andrew J. Fish, Mark Doran | 2011-07-05 |
| 7882339 | Primitives to enhance thread-level speculation | Quinn A. Jacobson, Hong Wang, John Shen, Gautham Chinya, Per Hammarlund +2 more | 2011-02-01 |
| 7849465 | Programmable event driven yield mechanism which may activate service threads | Xiang Zou, Hong Wang, Scott Dion Rodgers, Darrell D. Boggs, Shivanandan Kaushik +8 more | 2010-12-07 |
| 7810083 | Mechanism to emulate user-level multithreading on an OS-sequestered sequencer | Gautham Chinya, Hong Wang, Xiang Zou, James P. Held, Prashant Sethi +7 more | 2010-10-05 |
| 7793111 | Mechanism to handle events in a machine with isolated execution | Francis X. McKeen, Lawrence O. Smith, Benjamin Crawford Chaffin, Michael Cornaby | 2010-09-07 |
| 7743233 | Sequencer address management | Hong Wang, Gautham Chinya, Richard Hankins, Shivnandan Kaushik, John Shen +13 more | 2010-06-22 |
| 6920581 | Method and apparatus for functional redundancy check mode recovery | Shivnandan Kaushik, James B. Crossland | 2005-07-19 |
| 6898700 | Efficient saving and restoring state in task switching | William C. Alexander, Shreekant S. Thakkar, Patrice Roussel, Thomas R. Huff, Stephen A. Fischer | 2005-05-24 |
| 6857066 | Apparatus and method to identify the maximum operating frequency of a processor | Shivnandan Kaushik, Frank Binns | 2005-02-15 |
| 6526431 | Maintaining extended and traditional states of a processing unit in task switching | Kenneth Reneris, Shivnandan Kaushik | 2003-02-25 |
| 6349380 | Linear address extension and mapping to physical memory using 4 and 8 byte page table entries in a 32-bit microprocessor | Shahrokh Shahidzadeh, David B. Papworth, Frank Binns, Robert P. Colwell | 2002-02-19 |
| 6289431 | Method and apparatus for accessing more than 4 Gigabytes of physical memory with 4-byte table entries | Lance Hacking, Shahrokh Shahidzadeh, Shreekant S. Thakkar | 2001-09-11 |
| 5946713 | Memory attribute palette | Lance Hacking, Shahrokh Shahidzadeh, Shreekant S. Thakkar | 1999-08-31 |