Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12379931 | Mechanism for instruction fusion | Bret L. Toll, Jacob Daniel Morgan, Michael Spradling, David W. Nuechterlein | 2025-08-05 |
| 12346264 | Performing instruction fetch pipeline synchronization (IFPS) in processor-based devices | Bret L. Toll, George Van Horn Leming, III, Jonathan Christopher Perry | 2025-07-01 |
| 12333001 | Mitigation of return stack buffer side channel attacks in a processor | Bret L. Toll, Michael Chin | 2025-06-17 |
| 12020031 | Methods, apparatus, and instructions for user-level thread suspension | Michael Mishaeli, Jason W. Brandt, Gilbert Neiger, Asit K. Mallick, Rajesh M. Sankaran +3 more | 2024-06-25 |
| 11586537 | Method, apparatus, and system for run-time checking of memory tags in a processor-based system | Bret L. Toll, Jonathan Christopher Perry, Nagi Aboulenein | 2023-02-21 |
| 11023233 | Methods, apparatus, and instructions for user level thread suspension | Michael Mishaeli, Jason W. Brandt, Gilbert Neiger, Asit K. Mallick, Rajesh M. Sankaran +3 more | 2021-06-01 |
| 10175986 | Stateless capture of data linear addresses during precise event based sampling | Roger Gramunt, Ramon Matas, Neal S. Moyer, Rammohan Padmanabhan, Alexey P. Suprun +1 more | 2019-01-08 |
| 9898351 | Method and apparatus for user-level thread synchronization with a monitor and MWAIT architecture | Robert J. Kyanko, Avinash Sodani | 2018-02-20 |
| 9886396 | Scalable event handling in multi-threaded processor cores | Roger Gramunt, Rammohan Padmanabhan, Ramon Matas, Neal S. Moyer, Avinash Sodani +7 more | 2018-02-06 |
| 9804842 | Method and apparatus for efficiently managing architectural register state of a processor | Jesus Corbal San Adrian, Dennis R. Bradford, Taraneh Bahrami, Jonathan C. Hall, Thomas B. Maciukenas +2 more | 2017-10-31 |
| 9715432 | Memory fault suppression via re-execution and hardware FSM | Ramon Matas, Roger Gramunt, Chung-Lun Chan, Aditya Kesiraju, Jonathan C. Hall +1 more | 2017-07-25 |
| 9703566 | Sharing TLB mappings between contexts | Jonathan D. Combs, Jason W. Brandt, Julio Gago, Andrew F. Glew | 2017-07-11 |
| 9652237 | Stateless capture of data linear addresses during precise event based sampling | Roger Gramunt, Ramon Matas, Neal S. Moyer, Rammohan Padmanabhan, Alexey P. Suprun +1 more | 2017-05-16 |
| 8671275 | Mechanism to handle events in a machine with isolated execution | Francis X. McKeen, Lawrence O. Smith, Michael Cornaby, Bryant Bigbee | 2014-03-11 |
| 8522044 | Mechanism to handle events in a machine with isolated execution | Francis X. McKeen, Lawrence O. Smith, Michael Cornaby, Bryant Bigbee | 2013-08-27 |
| 8458464 | Mechanism to handle events in a machine with isolated execution | Francis X. McKeen, Lawrence O. Smith, Michael Cornaby, Bryant Bigbee | 2013-06-04 |
| 7793111 | Mechanism to handle events in a machine with isolated execution | Francis X. McKeen, Lawrence O. Smith, Michael Cornaby, Bryant Bigbee | 2010-09-07 |