Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12254061 | Apparatuses and methods to accelerate matrix multiplication | Maciej Urbanski, Brian J. Hickmann, Michael Rotzin, Krishnakumar Narayanan Nair, Andrew Yang +1 more | 2025-03-18 |
| 12135981 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2024-11-05 |
| 12086594 | Vector friendly instruction format and execution thereof | Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more | 2024-09-10 |
| 12073214 | Systems, apparatuses, and methods for chained fused multiply add | Jesus Corbal, Robert Valentine, Roman S. Dubtsov, Nikita A. Shustrov, Mark J. Charney +4 more | 2024-08-27 |
| 11740904 | Vector friendly instruction format and execution thereof | Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more | 2023-08-29 |
| 11693691 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2023-07-04 |
| 11593295 | Apparatuses, methods, and systems for operations in a configurable spatial accelerator | Kermin Fleming, Simon C. Steely, Jr., Kent D. Glossop, Mitchell Diamond, Benjamin Keen +3 more | 2023-02-28 |
| 11487541 | Systems, apparatuses, and methods for chained fused multiply add | Jesus Corbal, Robert Valentine, Roman S. Dubtsov, Nikita A. Shustrov, Mark J. Charney +4 more | 2022-11-01 |
| 11416281 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2022-08-16 |
| 11210096 | Vector friendly instruction format and execution thereof | Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more | 2021-12-28 |
| 11200186 | Apparatuses, methods, and systems for operations in a configurable spatial accelerator | Kermin Fleming, Simon C. Steely, Jr., Kent D. Glossop, Mitchell Diamond, Benjamin Keen +3 more | 2021-12-14 |
| 11093277 | Systems, methods, and apparatuses for heterogeneous computing | Rajesh M. Sankaran, Gilbert Neiger, Narayan Ranganathan, Stephen R. Van Doren, Joseph Nuzman +22 more | 2021-08-17 |
| 10853065 | Systems, apparatuses, and methods for chained fused multiply add | Jesus Corbal, Robert Valentine, Roman S. Dubtsov, Nikita A. Shustrov, Mark J. Charney +4 more | 2020-12-01 |
| 10817291 | Apparatuses, methods, and systems for swizzle operations in a configurable spatial accelerator | Jesus Corbal, Rohan Sharma, Simon C. Steely, Jr., Chinmay Ashok, Kent D. Glossop +4 more | 2020-10-27 |
| 10795680 | Vector friendly instruction format and execution thereof | Robert Valentine, Jesus Corbal San Adrian, Roger Espasa Sans, Robert Dale Cavin, Bret L. Toll +14 more | 2020-10-06 |
| 10719320 | Power noise injection to control rate of change of current | Federico Ardanaz, Roger Gramunt, Jesus Corbal, Jonathan M. Eastep | 2020-07-21 |
| 10678541 | Processors having fully-connected interconnects shared by vector conflict instructions and permute instructions | Andrew T. Forsyth | 2020-06-09 |
| 10649772 | Method and apparatus for efficient matrix transpose | Jesus Corbal, Brian J. Hickmann, Rohan Sharma | 2020-05-12 |
| 10423421 | Opportunistic utilization of redundant ALU | — | 2019-09-24 |
| 10268539 | Apparatus and method for multi-bit error detection and correction | Wei Wu, Brian J. Hickmann | 2019-04-23 |
| 10146535 | Systems, apparatuses, and methods for chained fused multiply add | Jesus Corbal, Robert Valentine, Roman S. Dubtsov, Nikita A. Shustrov, Mark J. Charney +4 more | 2018-12-04 |
| 10133577 | Vector mask driven clock gating for power efficiency of a processor | Jesus Corbal, Jonathan C. Hall, Thomas D. Fletcher, Brian J. Hickmann, Dror Markovich +1 more | 2018-11-20 |
| 9842046 | Processing memory access instructions that have duplicate memory indices | Andrew T. Forsyth, Jonathan C. Hall | 2017-12-12 |
| 9804842 | Method and apparatus for efficiently managing architectural register state of a processor | Jesus Corbal San Adrian, Benjamin Crawford Chaffin, Taraneh Bahrami, Jonathan C. Hall, Thomas B. Maciukenas +2 more | 2017-10-31 |
| 9785436 | Apparatus and method for efficient gather and scatter operations | Edward T. Grochowski, George Z. Chrysos, Andrew T. Forsyth, Michael D. Upton, Lisa K. Wu | 2017-10-10 |