Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12314727 | Optimized compute hardware for machine learning operations | Dipankar Das, Mikhail Smelyanskiy, Jesus Corbal, Dheevatsa Mudigere, Naveen Mellempudi +1 more | 2025-05-27 |
| 11334796 | Optimized compute hardware for machine learning operations | Dipankar Das, Mikhail Smelyanskiy, Jesus Corbal, Dheevatsa Mudigere, Naveen Mellempudi +1 more | 2022-05-17 |
| 10776699 | Optimized compute hardware for machine learning operations | Dipankar Das, Mikhail Smelyanskiy, Jesus Corbal, Dheevatsa Mudigere, Naveen Mellempudi +1 more | 2020-09-15 |
| 10719320 | Power noise injection to control rate of change of current | Federico Ardanaz, Jesus Corbal, Dennis R. Bradford, Jonathan M. Eastep | 2020-07-21 |
| 10445245 | Method, system, and apparatus for page sizing extension | Edward T. Grochowski, Julio Gago, Roger Espasa, Rolf Kassa | 2019-10-15 |
| 10445244 | Method, system, and apparatus for page sizing extension | Edward T. Grochowski, Julio Gago, Roger Espasa, Rolf Kassa | 2019-10-15 |
| 10175986 | Stateless capture of data linear addresses during precise event based sampling | Ramon Matas, Benjamin Crawford Chaffin, Neal S. Moyer, Rammohan Padmanabhan, Alexey P. Suprun +1 more | 2019-01-08 |
| 10007620 | System and method for cache replacement using conservative set dueling | Seth H. Pugsley, Christopher B. Wilkerson, Jonathan C. Hall, Prabhat Jain | 2018-06-26 |
| 9934155 | Method, system, and apparatus for page sizing extension | Edward T. Grochowski, Julio Gago, Roger Espasa, Rolf Kassa | 2018-04-03 |
| 9891914 | Method and apparatus for performing an efficient scatter | Ramon Matas, Alexey P. Suprun, Chung-Lun Chan, Rammohan Padmanabhan | 2018-02-13 |
| 9886396 | Scalable event handling in multi-threaded processor cores | Rammohan Padmanabhan, Ramon Matas, Neal S. Moyer, Benjamin Crawford Chaffin, Avinash Sodani +7 more | 2018-02-06 |
| 9804842 | Method and apparatus for efficiently managing architectural register state of a processor | Jesus Corbal San Adrian, Dennis R. Bradford, Benjamin Crawford Chaffin, Taraneh Bahrami, Jonathan C. Hall +2 more | 2017-10-31 |
| 9715432 | Memory fault suppression via re-execution and hardware FSM | Ramon Matas, Chung-Lun Chan, Benjamin Crawford Chaffin, Aditya Kesiraju, Jonathan C. Hall +1 more | 2017-07-25 |
| 9652237 | Stateless capture of data linear addresses during precise event based sampling | Ramon Matas, Benjamin Crawford Chaffin, Neal S. Moyer, Rammohan Padmanabhan, Alexey P. Suprun +1 more | 2017-05-16 |
| 9436468 | Technique for setting a vector mask | Roger Espasa | 2016-09-06 |
| 9244855 | Method, system, and apparatus for page sizing extension | Ed Grochowski, Julio Gago, Roger Espasa, Rolf Kassa | 2016-01-26 |
| 8707012 | Implementing vector memory operations | Roger Espasa, Joel S. Emer, Geoff Lowney, Santiago Galan, Toni Juan +3 more | 2014-04-22 |
| 8316216 | Implementing vector memory operations | Roger Espasa, Joel S. Emer, Geoff Lowney, Santiago Galan, Toni Juan +3 more | 2012-11-20 |
| 7627735 | Implementing vector memory operations | Roger Espasa, Joel S. Emer, Geoff Lowney, Santiago Galan, Toni Juan +3 more | 2009-12-01 |