Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
RG

Roger Gramunt — 19 Patents

Intel: 19 patents #2,167 of 30,777Top 8%
Portland, OR: #987 of 9,213 inventorsTop 15%
Oregon: #2,295 of 28,073 inventorsTop 9%
Overall (All Time): #229,345 of 4,157,543Top 6%
19 Patents All Time
Roger Gramunt has been granted 19 US patents while listed as an inventor at Intel. The first was granted in 2009 and the most recent in May 2025. Roger Gramunt ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Roger Gramunt in Portland, OR, US.

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12314727 Optimized compute hardware for machine learning operations Dipankar Das, Mikhail Smelyanskiy, Jesus Corbal, Dheevatsa Mudigere, Naveen Mellempudi +1 more 2025-05-27
11334796 Optimized compute hardware for machine learning operations Dipankar Das, Mikhail Smelyanskiy, Jesus Corbal, Dheevatsa Mudigere, Naveen Mellempudi +1 more 2022-05-17 $14,251,000
10776699 Optimized compute hardware for machine learning operations Dipankar Das, Mikhail Smelyanskiy, Jesus Corbal, Dheevatsa Mudigere, Naveen Mellempudi +1 more 2020-09-15 $34,212,000
10719320 Power noise injection to control rate of change of current Federico Ardanaz, Jesus Corbal, Dennis R. Bradford, Jonathan M. Eastep 2020-07-21 $33,796,000
10445245 Method, system, and apparatus for page sizing extension Edward T. Grochowski, Julio Gago, Roger Espasa, Rolf Kassa 2019-10-15 $18,012,000
10445244 Method, system, and apparatus for page sizing extension Edward T. Grochowski, Julio Gago, Roger Espasa, Rolf Kassa 2019-10-15 $18,012,000
10175986 Stateless capture of data linear addresses during precise event based sampling Ramon Matas, Benjamin Crawford Chaffin, Neal S. Moyer, Rammohan Padmanabhan, Alexey P. Suprun +1 more 2019-01-08 $28,117,000
10007620 System and method for cache replacement using conservative set dueling Seth H. Pugsley, Christopher B. Wilkerson, Jonathan C. Hall, Prabhat Jain 2018-06-26 $24,418,000
9934155 Method, system, and apparatus for page sizing extension Edward T. Grochowski, Julio Gago, Roger Espasa, Rolf Kassa 2018-04-03 $16,515,000
9891914 Method and apparatus for performing an efficient scatter Ramon Matas, Alexey P. Suprun, Chung-Lun Chan, Rammohan Padmanabhan 2018-02-13 $15,494,000
9886396 Scalable event handling in multi-threaded processor cores Rammohan Padmanabhan, Ramon Matas, Neal S. Moyer, Benjamin Crawford Chaffin, Avinash Sodani +7 more 2018-02-06 $17,987,000
9804842 Method and apparatus for efficiently managing architectural register state of a processor Jesus Corbal San Adrian, Dennis R. Bradford, Benjamin Crawford Chaffin, Taraneh Bahrami, Jonathan C. Hall +2 more 2017-10-31 $13,240,000
9715432 Memory fault suppression via re-execution and hardware FSM Ramon Matas, Chung-Lun Chan, Benjamin Crawford Chaffin, Aditya Kesiraju, Jonathan C. Hall +1 more 2017-07-25 $17,281,000
9652237 Stateless capture of data linear addresses during precise event based sampling Ramon Matas, Benjamin Crawford Chaffin, Neal S. Moyer, Rammohan Padmanabhan, Alexey P. Suprun +1 more 2017-05-16 $8,597,000
9436468 Technique for setting a vector mask Roger Espasa 2016-09-06 $9,244,000
9244855 Method, system, and apparatus for page sizing extension Ed Grochowski, Julio Gago, Roger Espasa, Rolf Kassa 2016-01-26 $9,792,000
8707012 Implementing vector memory operations Roger Espasa, Joel S. Emer, Geoff Lowney, Santiago Galan, Toni Juan +3 more 2014-04-22 $10,911,000
8316216 Implementing vector memory operations Roger Espasa, Joel S. Emer, Geoff Lowney, Santiago Galan, Toni Juan +3 more 2012-11-20 $10,358,000
7627735 Implementing vector memory operations Roger Espasa, Joel S. Emer, Geoff Lowney, Santiago Galan, Toni Juan +3 more 2009-12-01 $24,844,000