Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10713044 | Bit shuffle processors, methods, systems, and instructions | Guillem Sole, David Guillen Fandos | 2020-07-14 |
| 10445245 | Method, system, and apparatus for page sizing extension | Edward T. Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa | 2019-10-15 |
| 10445092 | Method and apparatus for performing a vector permute with an index and an immediate | Jesus Corbal San Adrian, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Mark J. Charney, Milind B. Girkar +4 more | 2019-10-15 |
| 10445244 | Method, system, and apparatus for page sizing extension | Edward T. Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa | 2019-10-15 |
| 10296334 | Method and apparatus for performing a vector bit gather | Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal San Adrian, Mark J. Charney, Guillem Sole | 2019-05-21 |
| 10296489 | Method and apparatus for performing a vector bit shuffle | Elmoustapha Ould-Ahmed-Vall, Jesus Corbal San Adrian, Robert Valentine, Mark J. Charney, Guillem Sole | 2019-05-21 |
| 9934155 | Method, system, and apparatus for page sizing extension | Edward T. Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa | 2018-04-03 |
| 9785433 | Three source operand floating-point addition instruction with operand negation bits and intermediate and final result rounding | Guillem Sole, Manel Fernandez | 2017-10-10 |
| 9733935 | Super multiply add (super madd) instruction | Jesus Corbal, Andrew T. Forsyth, Manel Fernandez, Thomas D. Fletcher | 2017-08-15 |
| 9654143 | Consecutive bit error detection and correction | Guillem Sole, Sorin Iacobovici, Brian J. Hickmann, Wei Wu, Thomas D. Fletcher | 2017-05-16 |
| 9606931 | Indicating a length of an instruction of a variable length instruction set | Santiago Galan, Julio Gago, Jose Gonzalez | 2017-03-28 |
| 9436468 | Technique for setting a vector mask | Roger Gramunt | 2016-09-06 |
| 9244855 | Method, system, and apparatus for page sizing extension | Ed Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa | 2016-01-26 |
| 8707012 | Implementing vector memory operations | Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan, Toni Juan +3 more | 2014-04-22 |
| 8533436 | Adaptively handling remote atomic execution based upon contention prediction | Joshua B. Fryman, Edward T. Grochowski, Toni Juan, Andrew T. Forsyth, John Cruz Mejia +3 more | 2013-09-10 |
| 8316216 | Implementing vector memory operations | Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan, Toni Juan +3 more | 2012-11-20 |
| 7627735 | Implementing vector memory operations | Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan, Toni Juan +3 more | 2009-12-01 |