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USPTO Patent Rankings Data through Dec 31, 2025
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Roger Espasa — 17 Patents

Intel: 17 patents #2,442 of 30,777Top 8%
Barcelona, ES: #65 of 5,109 inventorsTop 2%
Overall (All Time): #263,971 of 4,157,543Top 7%
17 Patents All Time
Roger Espasa has been granted 17 US patents while listed as an inventor at Intel. The first was granted in 2009 and the most recent in July 2020. Roger Espasa ranks #263,971 of 4,157,543 US inventors in our database (top 6.3%). Patent records list Roger Espasa in Barcelona, ES.

Issued Patents All Time

Showing 1–17 of 17 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
10713044 Bit shuffle processors, methods, systems, and instructions Guillem Sole, David Guillen Fandos 2020-07-14 $28,563,000
10445245 Method, system, and apparatus for page sizing extension Edward T. Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa 2019-10-15 $18,012,000
10445092 Method and apparatus for performing a vector permute with an index and an immediate Jesus Corbal San Adrian, Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Mark J. Charney, Milind B. Girkar +4 more 2019-10-15 $18,012,000
10445244 Method, system, and apparatus for page sizing extension Edward T. Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa 2019-10-15 $18,012,000
10296334 Method and apparatus for performing a vector bit gather Elmoustapha Ould-Ahmed-Vall, Robert Valentine, Jesus Corbal San Adrian, Mark J. Charney, Guillem Sole 2019-05-21 $20,944,000
10296489 Method and apparatus for performing a vector bit shuffle Elmoustapha Ould-Ahmed-Vall, Jesus Corbal San Adrian, Robert Valentine, Mark J. Charney, Guillem Sole 2019-05-21 $20,944,000
9934155 Method, system, and apparatus for page sizing extension Edward T. Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa 2018-04-03 $16,515,000
9785433 Three source operand floating-point addition instruction with operand negation bits and intermediate and final result rounding Guillem Sole, Manel Fernandez 2017-10-10 $9,084,000
9733935 Super multiply add (super madd) instruction Jesus Corbal, Andrew T. Forsyth, Manel Fernandez, Thomas D. Fletcher 2017-08-15 $8,272,000
9654143 Consecutive bit error detection and correction Guillem Sole, Sorin Iacobovici, Brian J. Hickmann, Wei Wu, Thomas D. Fletcher 2017-05-16 $8,597,000
9606931 Indicating a length of an instruction of a variable length instruction set Santiago Galan, Julio Gago, Jose Gonzalez 2017-03-28 $8,391,000
9436468 Technique for setting a vector mask Roger Gramunt 2016-09-06 $9,244,000
9244855 Method, system, and apparatus for page sizing extension Ed Grochowski, Julio Gago, Roger Gramunt, Rolf Kassa 2016-01-26 $9,792,000
8707012 Implementing vector memory operations Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan, Toni Juan +3 more 2014-04-22 $10,911,000
8533436 Adaptively handling remote atomic execution based upon contention prediction Joshua B. Fryman, Edward T. Grochowski, Toni Juan, Andrew T. Forsyth, John Cruz Mejia +3 more 2013-09-10 $11,653,000
8316216 Implementing vector memory operations Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan, Toni Juan +3 more 2012-11-20 $10,358,000
7627735 Implementing vector memory operations Joel S. Emer, Geoff Lowney, Roger Gramunt, Santiago Galan, Toni Juan +3 more 2009-12-01 $24,844,000