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Christopher B. Wilkerson — 83 Patents

Intel: 61 patents #470 of 30,777Top 2%

KCKepler Computing: 22 patents #16 of 42Top 40%

Portland, OR: #168 of 9,213 inventorsTop 2%

Oregon: #317 of 28,073 inventorsTop 2%

Overall (All Time): #21,013 of 4,157,543Top 1%

83 Patents All Time

Christopher B. Wilkerson has been granted 83 US patents while listed as an inventor at Intel. The first was granted in 2001 and the most recent in May 2025. Christopher B. Wilkerson ranks #21,013 of 4,157,543 US inventors in our database (top 0.51%). Patent records list Christopher B. Wilkerson in Portland, OR, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 83 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12308064	Random swap injection	Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya	2025-05-20
12243797	3D stack of split graphics processing logic dies	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2025-03-04
12086410	Ferroelectric memory chiplet in a multi-dimensional packaging with I/O switch embedded in a substrate or interposer	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2024-09-10
12079475	Ferroelectric memory chiplet in a multi-dimensional packaging	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2024-09-03
12026034	Method and apparatus for heuristic-based power gating of non-CMOS logic and CMOS based logic	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2024-07-02
12019492	Method and apparatus for managing power in a multi-dimensional packaging	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2024-06-25
12001266	Method and apparatus for managing power of ferroelectric or paraelectric logic and CMOS based logic	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2024-06-04
11899613	Method and apparatus to process an instruction for a distributed logic having tightly coupled accelerator core and processor core in a multi-dimensional packaging	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2024-02-13
11886884	Branch prediction based on coherence operations in processors	Binh Pham, Patrick Lu, Jared W. Stark, IV	2024-01-30	$30,721,000
11875836	Apparatus and method for endurance of non-volatile memory banks via wear leveling with linear indexing	Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya	2024-01-16
11869562	Apparatus and method for endurance of non-volatile memory banks via wear leveling in a round robin fashion	Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya	2024-01-09
11841757	Method and apparatus for cycle-by-cycle clock gating of ferroelectric or paraelectric logic and CMOS based logic	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2023-12-12
11844223	Ferroelectric memory chiplet as unified memory in a multi-dimensional packaging	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2023-12-12
11829699	Method to segregate logic and memory into separate dies for thermal management in a multi-dimensional packaging	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2023-11-28
11823725	Apparatus and method for endurance of non-volatile memory banks via multi-level wear leveling	Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya	2023-11-21
11816036	Method and system for performing data movement operations with read snapshot and in place write update	Anil Vasudevan, Venkata Krishnan, Andrew J. Herdrich, Ren Wang, Robert G. Blankenship +7 more	2023-11-14	$31,444,000
11791233	Ferroelectric or paraelectric memory and logic chiplet with thermal management in a multi-dimensional packaging	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2023-10-17
11790969	Apparatus and method for endurance of non-volatile memory banks via outlier compensation	Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya	2023-10-17
11694940	3D stack of accelerator die and multi-core processor die	Amrita Mathuriya, Rajeev Kumar Dokania, Debo Olaosebikan, Sasikanth Manipatruni	2023-07-04
11670352	Apparatus and method for endurance of non-volatile memory banks via wear leveling and outlier compensation	Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya	2023-06-06
11373728	Method for improving memory bandwidth through read and restore decoupling	Rajeev Kumar Dokania, Sasikanth Manipatruni, Amrita Mathuriya	2022-06-28
11373727	Apparatus for improving memory bandwidth through read and restore decoupling	Rajeev Kumar Dokania, Sasikanth Manipatruni, Amrita Mathuriya	2022-06-28
11366589	Efficient method for improving memory bandwidth through read and restore decoupling using restore buffer	Rajeev Kumar Dokania, Sasikanth Manipatruni, Amrita Mathuriya	2022-06-21
11327894	Method and system for performing data movement operations with read snapshot and in place write update	Anil Vasudevan, Venkata Krishnan, Andrew J. Herdrich, Ren Wang, Robert G. Blankenship +7 more	2022-05-10	$19,182,000
11295796	Apparatus and method for endurance of non-volatile memory banks via wear leveling and random swap injection	Sasikanth Manipatruni, Rajeev Kumar Dokania, Amrita Mathuriya	2022-04-05