Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10318427 | Resolving memory accesses crossing cache line boundaries | Ramon Matas, Alexey P. Suprun, Aditya Kesiraju | 2019-06-11 |
| 10261904 | Memory sequencing with coherent and non-coherent sub-systems | Chunhui Zhang, George Z. Chrysos, Edward T. Grochowski, Ramacharan Sundararaman, Federico Ardanaz | 2019-04-16 |
| 10108554 | Apparatuses, methods, and systems to share translation lookaside buffer entries | Ramon Matas | 2018-10-23 |
| 9891914 | Method and apparatus for performing an efficient scatter | Ramon Matas, Alexey P. Suprun, Roger Gramunt, Rammohan Padmanabhan | 2018-02-13 |
| 9886396 | Scalable event handling in multi-threaded processor cores | Roger Gramunt, Rammohan Padmanabhan, Ramon Matas, Neal S. Moyer, Benjamin Crawford Chaffin +7 more | 2018-02-06 |
| 9875185 | Memory sequencing with coherent and non-coherent sub-systems | Chunhui Zhang, George Z. Chrysos, Edward T. Grochowski, Ramacharan Sundararaman, Federico Ardanaz | 2018-01-23 |
| 9715432 | Memory fault suppression via re-execution and hardware FSM | Ramon Matas, Roger Gramunt, Benjamin Crawford Chaffin, Aditya Kesiraju, Jonathan C. Hall +1 more | 2017-07-25 |