| 12204408 |
Memory tiering techniques in computing systems |
Ishwar Agarwal, Oscar Rosell Martinez |
2025-01-21 |
|
| 12204909 |
Direct swap caching with zero line optimizations |
Ishwar Agarwal, Oscar Rosell Martinez, Yevgeniy Bak |
2025-01-21 |
|
| 12086080 |
Apparatuses, methods, and systems for a configurable accelerator having dataflow execution circuits |
Bhargavi Narayanasetty, Jesus Corbal, Ching-Kai Liang, Chinmay Ashok, Francis Tseng |
2024-09-10 |
$16,964,000 |
| 11899615 |
Multiple dies hardware processors and methods |
Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more |
2024-02-13 |
$18,546,000 |
| 11847459 |
Direct swap caching with zero line optimizations |
Ishwar Agarwal, Oscar Rosell Martinez, Yevgeniy Bak |
2023-12-19 |
$382,128,000 |
| 11599415 |
Memory tiering techniques in computing systems |
Ishwar Agarwal, Oscar Rosell Martinez |
2023-03-07 |
$179,719,000 |
| 11586579 |
Multiple dies hardware processors and methods |
Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more |
2023-02-21 |
$13,703,000 |
| 11321171 |
Memory operations management in computing systems |
Ishwar Agarwal, Oscar Rosell Martinez |
2022-05-03 |
$297,849,000 |
| 11294852 |
Multiple dies hardware processors and methods |
Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more |
2022-04-05 |
$18,322,000 |
| 10795853 |
Multiple dies hardware processors and methods |
Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more |
2020-10-06 |
$29,609,000 |
| 10719317 |
Hardware apparatuses and methods relating to elemental register accesses |
Victor K. Lee, Ugonna Echeruo, Naveen Mellempudi |
2020-07-21 |
$33,796,000 |
| 10671740 |
Supporting configurable security levels for memory address ranges |
Binata Bhattacharyya, Raghunandan Makaram, Amy L. Santoni, Simon P. Johnson, Brian S. Morris +1 more |
2020-06-02 |
$32,838,000 |
| 10261904 |
Memory sequencing with coherent and non-coherent sub-systems |
Chunhui Zhang, Edward T. Grochowski, Ramacharan Sundararaman, Chung-Lun Chan, Federico Ardanaz |
2019-04-16 |
$24,207,000 |
| 10230528 |
Tree-less integrity and replay memory protection for trusted execution environment |
Binata Bhattacharyya, Amy L. Santoni, Raghunandan Makaram, Francis X. McKeen, Simon P. Johnson +1 more |
2019-03-12 |
$21,255,000 |
| 9996347 |
Hardware apparatuses and methods relating to elemental register accesses |
Victor K. Lee, Ugonna Echeruo, Naveen Mellempudi |
2018-06-12 |
$21,622,000 |
| 9959418 |
Supporting configurable security levels for memory address ranges |
Binata Bhattacharyya, Raghunandan Makaram, Amy L. Santoni, Simon P. Johnson, Brian S. Morris +1 more |
2018-05-01 |
$34,156,000 |
| 9875185 |
Memory sequencing with coherent and non-coherent sub-systems |
Chunhui Zhang, Edward T. Grochowski, Ramacharan Sundararaman, Chung-Lun Chan, Federico Ardanaz |
2018-01-23 |
$21,180,000 |
| 9785436 |
Apparatus and method for efficient gather and scatter operations |
Edward T. Grochowski, Dennis R. Bradford, Andrew T. Forsyth, Michael D. Upton, Lisa K. Wu |
2017-10-10 |
$9,084,000 |
| 9465670 |
Generational thread scheduler using reservations for fair scheduling |
Edward T. Grochowski, Michael D. Upton, Chunhui Zhang, Mohammed L. Al-Aqrabawi |
2016-10-11 |
$13,479,000 |
| 9430389 |
Prefetch with request for ownership without data |
Jesus Corbal, Lisa K. Wu, Andrew T. Forsyth, Ramacharan Sundararaman |
2016-08-30 |
$15,019,000 |
| 8924690 |
Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction |
Tryggve Fossum, Todd Dutton |
2014-12-30 |
$18,984,000 |
| 8407421 |
Cache spill management techniques using cache spill prediction |
Simon C. Steely, Jr., William C. Hasenplaugh, Aamer Jaleel |
2013-03-26 |
$14,049,000 |
| 8209490 |
Protocol for maintaining cache coherency in a CMP |
Matthew Mattina |
2012-06-26 |
$19,388,000 |
| 8190863 |
Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction |
Tryggve Fossum, Todd Dutton |
2012-05-29 |
$17,150,000 |
| 8078831 |
Method and apparatus for affinity-guided speculative helper threads in chip multiprocessors |
Hong Wang, Perry Wang, Jeffery A. Brown, Per Hammarlund, Doron Orenstein +2 more |
2011-12-13 |
$17,618,000 |
