Issued Patents All Time
Showing 25 most recent of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12204408 | Memory tiering techniques in computing systems | Ishwar Agarwal, Oscar Rosell Martinez | 2025-01-21 |
| 12204909 | Direct swap caching with zero line optimizations | Ishwar Agarwal, Oscar Rosell Martinez, Yevgeniy Bak | 2025-01-21 |
| 12086080 | Apparatuses, methods, and systems for a configurable accelerator having dataflow execution circuits | Bhargavi Narayanasetty, Jesus Corbal, Ching-Kai Liang, Chinmay Ashok, Francis Tseng | 2024-09-10 |
| 11899615 | Multiple dies hardware processors and methods | Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more | 2024-02-13 |
| 11847459 | Direct swap caching with zero line optimizations | Ishwar Agarwal, Oscar Rosell Martinez, Yevgeniy Bak | 2023-12-19 |
| 11599415 | Memory tiering techniques in computing systems | Ishwar Agarwal, Oscar Rosell Martinez | 2023-03-07 |
| 11586579 | Multiple dies hardware processors and methods | Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more | 2023-02-21 |
| 11321171 | Memory operations management in computing systems | Ishwar Agarwal, Oscar Rosell Martinez | 2022-05-03 |
| 11294852 | Multiple dies hardware processors and methods | Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more | 2022-04-05 |
| 10795853 | Multiple dies hardware processors and methods | Nevine Nassif, Yen-Cheng Liu, Krishnakanth V. Sistla, Gerald Pasdast, Siva Soumya Eachempati +10 more | 2020-10-06 |
| 10719317 | Hardware apparatuses and methods relating to elemental register accesses | Victor K. Lee, Ugonna Echeruo, Naveen Mellempudi | 2020-07-21 |
| 10671740 | Supporting configurable security levels for memory address ranges | Binata Bhattacharyya, Raghunandan Makaram, Amy L. Santoni, Simon P. Johnson, Brian S. Morris +1 more | 2020-06-02 |
| 10261904 | Memory sequencing with coherent and non-coherent sub-systems | Chunhui Zhang, Edward T. Grochowski, Ramacharan Sundararaman, Chung-Lun Chan, Federico Ardanaz | 2019-04-16 |
| 10230528 | Tree-less integrity and replay memory protection for trusted execution environment | Binata Bhattacharyya, Amy L. Santoni, Raghunandan Makaram, Francis X. McKeen, Simon P. Johnson +1 more | 2019-03-12 |
| 9996347 | Hardware apparatuses and methods relating to elemental register accesses | Victor K. Lee, Ugonna Echeruo, Naveen Mellempudi | 2018-06-12 |
| 9959418 | Supporting configurable security levels for memory address ranges | Binata Bhattacharyya, Raghunandan Makaram, Amy L. Santoni, Simon P. Johnson, Brian S. Morris +1 more | 2018-05-01 |
| 9875185 | Memory sequencing with coherent and non-coherent sub-systems | Chunhui Zhang, Edward T. Grochowski, Ramacharan Sundararaman, Chung-Lun Chan, Federico Ardanaz | 2018-01-23 |
| 9785436 | Apparatus and method for efficient gather and scatter operations | Edward T. Grochowski, Dennis R. Bradford, Andrew T. Forsyth, Michael D. Upton, Lisa K. Wu | 2017-10-10 |
| 9465670 | Generational thread scheduler using reservations for fair scheduling | Edward T. Grochowski, Michael D. Upton, Chunhui Zhang, Mohammed L. Al-Aqrabawi | 2016-10-11 |
| 9430389 | Prefetch with request for ownership without data | Jesus Corbal, Lisa K. Wu, Andrew T. Forsyth, Ramacharan Sundararaman | 2016-08-30 |
| 8924690 | Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction | Tryggve Fossum, Todd Dutton | 2014-12-30 |
| 8407421 | Cache spill management techniques using cache spill prediction | Simon C. Steely, Jr., William C. Hasenplaugh, Aamer Jaleel | 2013-03-26 |
| 8209490 | Protocol for maintaining cache coherency in a CMP | Matthew Mattina | 2012-06-26 |
| 8190863 | Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restriction | Tryggve Fossum, Todd Dutton | 2012-05-29 |
| 8078831 | Method and apparatus for affinity-guided speculative helper threads in chip multiprocessors | Hong Wang, Perry Wang, Jeffery A. Brown, Per Hammarlund, Doron Orenstein +2 more | 2011-12-13 |