| 9785436 |
Apparatus and method for efficient gather and scatter operations |
Edward T. Grochowski, Dennis R. Bradford, George Z. Chrysos, Andrew T. Forsyth, Lisa K. Wu |
2017-10-10 |
$9,084,000 |
| 9465670 |
Generational thread scheduler using reservations for fair scheduling |
Edward T. Grochowski, George Z. Chrysos, Chunhui Zhang, Mohammed L. Al-Aqrabawi |
2016-10-11 |
$13,479,000 |
| RE45487 |
Processor having execution core sections operating at different clock rates |
David J. Sager, Thomas D. Fletcher, Glenn J. Hinton |
2015-04-21 |
|
| 8850165 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Darrell D. Boggs, David J. Sager |
2014-09-30 |
$16,330,000 |
| RE44494 |
Processor having execution core sections operating at different clock rates |
David J. Sager, Thomas D. Fletcher, Glenn J. Hinton |
2013-09-10 |
|
| 7987346 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Darrell D. Boggs, David J. Sager |
2011-07-26 |
$21,887,000 |
| 7877583 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Darrell D. Boggs, David J. Sager |
2011-01-25 |
$27,856,000 |
| 7454600 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Darrell D. Boggs, David J. Sager |
2008-11-18 |
$14,632,000 |
| 7085889 |
Use of a context identifier in a cache memory |
Per Hammarlund, Aravindh Baktha, Venkat K. S. Venkatraman |
2006-08-01 |
$14,842,000 |
| 7010669 |
Determining whether thread fetch operation will be blocked due to processing of another thread |
David William Burns, James D. Allen, IV, Darrell D. Boggs, Alan B. Kyker |
2006-03-07 |
$16,275,000 |
| 6735688 |
Processor having replay architecture with fast and slow replay paths |
David J. Sager, Darrell D. Boggs, Glenn J. Hinton |
2004-05-11 |
$33,328,000 |
| 6651158 |
Determination of approaching instruction starvation of threads based on a plurality of conditions |
David William Burns, James D. Allen, IV, Darrell D. Boggs, Alan B. Kyker |
2003-11-18 |
$37,831,000 |
| 6643747 |
Processing requests to efficiently access a limited bandwidth storage area |
Per Hammarlund, Douglas M. Carmean |
2003-11-04 |
$42,713,000 |
| 6487675 |
Processor having execution core sections operating at different clock rates |
David J. Sager, Thomas D. Fletcher, Glenn J. Hinton |
2002-11-26 |
$59,548,000 |
| 6370625 |
Method and apparatus for lock synchronization in a microprocessor system |
Douglas M. Carmean, Harish Kumar, Brent E. Lince, Zhongying Zhang |
2002-04-09 |
$80,316,000 |
| 6256745 |
Processor having execution core sections operating at different clock rates |
David J. Sager, Thomas D. Fletcher, Glenn J. Hinton |
2001-07-03 |
$161,128,000 |
| 6216234 |
Processor having execution core sections operating at different clock rates |
David J. Sager, Thomas D. Fletcher, Glenn J. Hinton |
2001-04-10 |
$109,826,000 |
| 6170038 |
Trace based instruction caching |
Robert F. Krick, Glenn J. Hinton, David J. Sager, Chan Woo Lee |
2001-01-02 |
$205,888,000 |
| 6138225 |
Address translation system having first and second translation look aside buffers |
Gregory Thornton, Bryon Conley |
2000-10-24 |
$347,431,000 |
| 6094717 |
Computer processor with a replay system having a plurality of checkers |
Amit Merchant, David J. Sager, Darrell D. Boggs |
2000-07-25 |
$293,482,000 |
| 6018786 |
Trace based instruction caching |
Robert F. Krick, Glenn J. Hinton, David J. Sager, Chan Woo Lee |
2000-01-25 |
$365,842,000 |
| 5828868 |
Processor having execution core sections operating at different clock rates |
David J. Sager, Thomas D. Fletcher, Glenn J. Hinton |
1998-10-27 |
$71,819,000 |
| 5351197 |
Method and apparatus for designing the layout of a subcircuit in an integrated circuit |
Thomas F. Rossman, Dean P. Frazier, Jay Scott Fuller, Kendall C. Russell |
1994-09-27 |
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