| 10642744 |
Memory type which is cacheable yet inaccessible by speculative instructions |
Ross Segelken, Mike Cornaby, Nick Fortino, Shailender Chaudhry, Denis M. Khartikov +3 more |
2020-05-05 |
$388,005,000 |
| 9891972 |
Lazy runahead operation for a microprocessor |
Magnus Ekman, Ross Segelken, Guillermo J. Rozas, Alexander Klaiber, James van Zoeren +4 more |
2018-02-13 |
$344,474,000 |
| 9875105 |
Checkpointed buffer for re-entry from runahead |
Guillermo J. Rozas, Paul Serris, Brad Hoyt, Sridharan Ramakrishnan, Hens Vanderschoot +2 more |
2018-01-23 |
$437,819,000 |
| 9823931 |
Queued instruction re-dispatch after runahead |
Guillermo J. Rozas, Alexander Klaiber, James van Zoeren, Paul Serris, Brad Hoyt +6 more |
2017-11-21 |
$112,129,000 |
| 9740553 |
Managing potentially invalid results during runahead |
Bruce Holmer, Guillermo J. Rozas, Alexander Klaiber, James van Zoeren, Paul Serris +5 more |
2017-08-22 |
$236,127,000 |
| 9632976 |
Lazy runahead operation for a microprocessor |
Guillermo J. Rozas, Alexander Klaiber, James van Zoeren, Paul Serris, Brad Hoyt +4 more |
2017-04-25 |
$164,591,000 |
| 9563432 |
Dynamic configuration of processing pipeline based on determined type of fetched instruction |
Ross Segelken, Shiaoli Mendyke |
2017-02-07 |
$180,900,000 |
| 8850165 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Michael D. Upton, David J. Sager |
2014-09-30 |
$16,330,000 |
| 7987346 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Michael D. Upton, David J. Sager |
2011-07-26 |
$21,887,000 |
| 7877583 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Michael D. Upton, David J. Sager |
2011-01-25 |
$27,856,000 |
| 7849465 |
Programmable event driven yield mechanism which may activate service threads |
Xiang Zou, Hong Wang, Scott Dion Rodgers, Bryant Bigbee, Shivanandan Kaushik +8 more |
2010-12-07 |
$26,454,000 |
| 7454600 |
Method and apparatus for assigning thread priority in a processor or the like |
David William Burns, James D. Allen, IV, Michael D. Upton, David J. Sager |
2008-11-18 |
$14,632,000 |
| 7366879 |
Alteration of functional unit partitioning scheme in multithreaded processor based upon thread statuses |
Dion Rodgers, Amit Merchant, Rajesh Kota, Rachel Hsu |
2008-04-29 |
$13,885,000 |
| 7353370 |
Method and apparatus for processing an event occurrence within a multithreaded processor |
Dion Rodgers, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur |
2008-04-01 |
$16,890,000 |
| 7219349 |
Multi-threading techniques for a processor utilizing a replay queue |
Amit Merchant, David J. Sager |
2007-05-15 |
$17,522,000 |
| 7216220 |
Microprocessor with customer code store |
Gary L. Brown, Christopher S. Jones |
2007-05-08 |
|
| 7200737 |
Processor with a replay system that includes a replay queue for improved throughput |
Amit Merchant, David J. Sager |
2007-04-03 |
$17,128,000 |
| 7181598 |
Prediction of load-store dependencies in a processing agent |
Stephan Jourdan, John A. Miller, Ronak Singhal |
2007-02-20 |
$9,940,000 |
| 7089409 |
Interface to a memory system for a processor having a replay system |
Amit Merchant, David J. Sager |
2006-08-08 |
$12,359,000 |
| 7051329 |
Method and apparatus for managing resources in a multithreaded processor |
Shlomit Weiss |
2006-05-23 |
$10,027,000 |
| 7039794 |
Method and apparatus for processing an event occurrence for a least one thread within a multithreaded processor |
Dion Rodgers, Amit Merchant, Rajesh Kota, Rachel Hsu, Keshavan Tiruvallur |
2006-05-02 |
$12,289,000 |
| 7010669 |
Determining whether thread fetch operation will be blocked due to processing of another thread |
David William Burns, James D. Allen, IV, Michael D. Upton, Alan B. Kyker |
2006-03-07 |
$16,275,000 |
| 6981129 |
Breaking replay dependency loops in a processor using a rescheduled replay queue |
Douglas M. Carmean, Per Hammarlund, Francis X. McKeen, David J. Sager, Ronak Singhal |
2005-12-27 |
$17,238,000 |
| 6889319 |
Method and apparatus for entering and exiting multiple threads within a multithreaded processor |
Dion Rodgers, Amit Merchant, Rajesh Kota, Rachel Hsu |
2005-05-03 |
$20,343,000 |
| 6877086 |
Method and apparatus for rescheduling multiple micro-operations in a processor using a replay queue and a counter |
Douglas M. Carmean, Per Hammarlund, Francis X. McKeen, David J. Sager, Ronak Singhal |
2005-04-05 |
$32,622,000 |
