PS

Paul Serris

TR Transmeta: 9 patents #11 of 86Top 15%
NV NVIDIA: 8 patents #909 of 7,811Top 15%
Overall (All Time): #154,226 of 4,157,543Top 4%
26
Patents All Time

Issued Patents All Time

Showing 25 most recent of 26 patents

Patent #TitleCo-InventorsDate
10628160 Selective poisoning of data during runahead Magnus Ekman, James van Zoeren 2020-04-21
10001996 Selective poisoning of data during runahead Magnus Ekman, James van Zoeren 2018-06-19
9891972 Lazy runahead operation for a microprocessor Magnus Ekman, Ross Segelken, Guillermo J. Rozas, Alexander Klaiber, James van Zoeren +4 more 2018-02-13
9875105 Checkpointed buffer for re-entry from runahead Guillermo J. Rozas, Brad Hoyt, Sridharan Ramakrishnan, Hens Vanderschoot, Ross Segelken +2 more 2018-01-23
9823931 Queued instruction re-dispatch after runahead Guillermo J. Rozas, Alexander Klaiber, James van Zoeren, Brad Hoyt, Sridharan Ramakrishnan +6 more 2017-11-21
9740553 Managing potentially invalid results during runahead Bruce Holmer, Guillermo J. Rozas, Alexander Klaiber, James van Zoeren, Brad Hoyt +5 more 2017-08-22
9645929 Speculative permission acquisition for shared memory James van Zoeren, Alexander Klaiber, Guillermo J. Rozas 2017-05-09
9632976 Lazy runahead operation for a microprocessor Guillermo J. Rozas, Alexander Klaiber, James van Zoeren, Brad Hoyt, Sridharan Ramakrishnan +4 more 2017-04-25
9081563 Method and apparatus for enhancing scheduling in an advanced microprocessor Guillermo J. Rozas, Godfrey P. D'Souza, Charles R. Price 2015-07-14
8516224 Pipeline replay support for multicycle operations Brett W. Coon, Godfrey P. D'Souza 2013-08-20
8209517 Method and apparatus for enhancing scheduling in an advanced microprocessor Guillermo J. Rozas, Godfrey P. D'Souza, Charles R. Price 2012-06-26
8117423 Pipeline replay support for multicycle operations Brett W. Coon, Godfrey P. D'Souza 2012-02-14
7886135 Pipeline replay support for unaligned memory operations Brett W. Coon, Godfrey P. D'Souza 2011-02-08
7873793 Supporting speculative modification in a data cache Guillermo J. Rozas, Alexander Klaiber, David Dunn, Lacky V. Shah 2011-01-18
7725656 Braided set associative caching techniques Guillermo J. Rozas, Alexander Klaiber, Robert P. Masleid, John Banning, James Van Zoeren 2010-05-25
7685403 Pipeline replay support for multi-cycle operations Brett W. Coon, Godfrey P. D'Souza 2010-03-23
7606979 Method and system for conservatively managing store capacity available to a processor issuing stores Guillermo J. Rozas, Alexander Klaiber, David Dunn, Lacky V. Shah 2009-10-20
7225299 Supporting speculative modification in a data cache Guillermo J. Rozas, Alexander Klaiber, David Dunn, Lacky V. Shah 2007-05-29
7149851 Method and system for conservatively managing store capacity available to a processor issuing stores Guillermo J. Rozas, Alexander Klaiber, David Dunn, Lacky V. Shah 2006-12-12
7134001 Pipeline replay support for unaligned memory operations Brett W. Coon, Godfrey P. D'Souza 2006-11-07
7089404 Method and apparatus for enhancing scheduling in an advanced microprocessor Guillermo J. Rozas, Godfrey P. D'Souza, Charles R. Price 2006-08-08
6728865 Pipeline replay support for unaligned memory operations Brett W. Coon, Godfrey P. D'Souza 2004-04-27
6604188 Pipeline replay support for multi-cycle operations wherein all VLIW instructions are flushed upon detection of a multi-cycle atom operation in a VLIW instruction Brett W. Coon, Godfrey P. D'Souza 2003-08-05
6571316 Cache memory array for multiple address spaces Godfrey P. D'Souza 2003-05-27
6513110 Check instruction and method David Keppel, Godfrey P. D'Souza 2003-01-28