Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12354704 | Active current consumption save mode for non-volatile memory using fast programming | Ke Zhang, Linnan Chen, Liang Li, Minna Li, Chin-Yi Chen +2 more | 2025-07-08 |
| 12327046 | Data retention-specific refresh read | Deepanshu Dutta, Abhijith Prakash | 2025-06-10 |
| 12205657 | Hybrid smart verify for QLC/TLC die | Xiang Yang, Henry Chin, Erika Penzo | 2025-01-21 |
| 12142315 | Low power multi-level cell (MLC) programming in non-volatile memory structures | Xiang Yang, Jiacen Guo | 2024-11-12 |
| 12112800 | High speed multi-level cell (MLC) programming in non-volatile memory structures | Xiang Yang, Deepanshu Dutta, Jiacen Guo | 2024-10-08 |
| 12079496 | Bundle multiple timing parameters for fast SLC programming | Chin-Yi Chen, Xiang Yang | 2024-09-03 |
| 12057168 | Neighbor aware multi-bias programming in scaled BICS | Deepanshu Dutta | 2024-08-06 |
| 12057175 | Memory apparatus and method of operation using state dependent strobe tier scan to reduce peak ICC | Chin-Yi Chen, Kou Tei, Deepanshu Dutta, Hiroyuki Mizukoshi, Jiahui Yuan +1 more | 2024-08-06 |
| 11887677 | Quick pass write programming techniques in a memory device | Deepanshu Dutta, Gerrit Jan Hemink | 2024-01-30 |
| 11830555 | Bias for data retention in fuse ROM and flash memory | Deepanshu Dutta | 2023-11-28 |
| 11776634 | Pulsed bias for power-up or read recovery | Deepanshu Dutta | 2023-10-03 |
| 11574693 | Memory apparatus and method of operation using periodic normal erase dummy cycle to improve stripe erase endurance and data retention | Chin-Yi Chen, Dengtao Zhao, Anubhav Khandelwal, Ravi Kumar | 2023-02-07 |
| 11475967 | Modified verify in a memory device | Xue Bai Pitner, Ravi Kumar | 2022-10-18 |
| 11423993 | Bi-directional sensing in a memory | Zhiping Zhang, Huai-Yuan Tseng, Peng Zhang, Dengtao Zhao, Deepanshu Dutta | 2022-08-23 |
| 11417393 | Two-stage programming using variable step voltage (DVPGM) for non-volatile memory structures | Sujjatul Islam, Ravi Kumar | 2022-08-16 |
| 11322213 | Enhanced multistate verify techniques in a memory device | Deepanshu Dutta | 2022-05-03 |
| 11139038 | Neighboring or logical minus word line dependent verify with sense time in programming of non-volatile memory | Deepanshu Dutta, Huai-Yuan Tseng | 2021-10-05 |
| 11081184 | Method of concurrent multi-state programming of non-volatile memory with bit line voltage step up | Zhiping Zhang, Huai-Yuan Tseng, Dengtao Zhao, Deepanshu Dutta | 2021-08-03 |
| 10984876 | Temperature based programming in memory | Piyush Dak, Mohan Dunga, Chao Qin, Xiang Yang | 2021-04-20 |
| 10312342 | NEMS devices with series ferroelectric negative capacitor | Muhammad Ashraful Alam, Ankit Jain | 2019-06-04 |
| 10217520 | Pulsed control line biasing in memory | Deepanshu Dutta, Jong Hak Yuh | 2019-02-26 |
| 10014063 | Smart skip verify mode for programming a memory device | Huai-Yuan Tseng, Deepanshu Dutta, Tai-Yuan Tseng, Grishma Shah | 2018-07-03 |
| 9842657 | Multi-state program using controlled weak boosting for non-volatile memory | Deepanshu Dutta, Xiaochang Miao | 2017-12-12 |
| 9779832 | Pulsed control line biasing in memory | Deepanshu Dutta, Jong Hak Yuh | 2017-10-03 |
| 9755041 | NEMS devices with series ferroelectric negative capacitor | Muhammad Ashraful Alam, Ankit Jain | 2017-09-05 |