Issued Patents All Time
Showing 25 most recent of 187 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417809 | Open block read ICC reduction | Abu Naser Zainuddin, Jiahui Yuan | 2025-09-16 |
| 12380954 | Dynamic 1-tier scan for high performance 3D NAND | Xiang Yang, Huai-Yuan Tseng | 2025-08-05 |
| 12354680 | High performance verify techniques in a memory device | Xiang Yang, Wei Cao | 2025-07-08 |
| 12354683 | Non-volatile memory with erase depth detection and adaptive adjustment to programming | Huiwen Xu, Bo Lei | 2025-07-08 |
| 12334160 | Apparatus and method for detecting neighbor plane erase failures | Parth Amin, Anubhav Khandelwal | 2025-06-17 |
| 12327046 | Data retention-specific refresh read | Muhammad Masuduzzaman, Abhijith Prakash | 2025-06-10 |
| 12254931 | Three-bit-per-cell programming using a four-bit-per-cell programming algorithm | Xiang Yang, Jiacen Guo, Takayuki Inoue, Hua-Ling Cynthia Hsu | 2025-03-18 |
| 12249378 | CELSRC voltage separation between SLC and XLC for SLC program average ICC reduction | Yu-Chung Lien, Sarath Puthenthermadam, Jiahui Yuan | 2025-03-11 |
| 12243593 | Low power read method and a memory device capable thereof | Xiang Yang, Ohwon Kwon, James Kai, Yuki Mizutani | 2025-03-04 |
| 12198765 | Pump skip for fast single-level cell non-volatile memory | Xiang Yang, Chin-Yi Chen | 2025-01-14 |
| 12112800 | High speed multi-level cell (MLC) programming in non-volatile memory structures | Xiang Yang, Muhammad Masuduzzaman, Jiacen Guo | 2024-10-08 |
| 12057175 | Memory apparatus and method of operation using state dependent strobe tier scan to reduce peak ICC | Chin-Yi Chen, Muhammad Masuduzzaman, Kou Tei, Hiroyuki Mizukoshi, Jiahui Yuan +1 more | 2024-08-06 |
| 12057168 | Neighbor aware multi-bias programming in scaled BICS | Muhammad Masuduzzaman | 2024-08-06 |
| 12051468 | Soft erase process during programming of non-volatile memory | Jiahui Yuan | 2024-07-30 |
| 12051467 | Programming of memory cells using a memory string dependent program voltage | Huai-Yuan Tseng, Henry Chin | 2024-07-30 |
| 12046302 | Edge word line concurrent programming with verify for memory apparatus with on-pitch semi-circle drain side select gate technology | Xiang Yang, Ken Oowada | 2024-07-23 |
| 11972812 | Non-volatile memory with data refresh based on data states of adjacent memory cells | Yi Song, Jiahui Yuan, Jun Wan | 2024-04-30 |
| 11961563 | Balancing peak power with programming speed in non-volatile memory | Towhidur Razzak, Jiahui Yuan | 2024-04-16 |
| 11894062 | Semi-circle drain side select gate maintenance by selective semi-circle dummy word line program | Xiang Yang, Gerrit Jan Hemink, Shubhajit Mukherjee | 2024-02-06 |
| 11887677 | Quick pass write programming techniques in a memory device | Muhammad Masuduzzaman, Gerrit Jan Hemink | 2024-01-30 |
| 11887670 | Controlling bit line pre-charge voltage separately for multi-level memory cells and single-level memory cells to reduce peak current consumption | Yu-Chung Lien, Jiahui Yuan | 2024-01-30 |
| 11875842 | Systems and methods for staggering read operation of sub-blocks | Yu-Chung Lien, Tai-Yuan Tseng | 2024-01-16 |
| 11830555 | Bias for data retention in fuse ROM and flash memory | Muhammad Masuduzzaman | 2023-11-28 |
| 11798625 | Program dependent biasing of unselected sub-blocks | Xiang Yang, Gerrit Jan Hemink | 2023-10-24 |
| 11776634 | Pulsed bias for power-up or read recovery | Muhammad Masuduzzaman | 2023-10-03 |