Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Ohwon Kwon — 19 Patents

STSandisk Technologies: 18 patents #207 of 2,224Top 10%
KMKorea Institute Of Machinery & Materials: 1 patents #283 of 729Top 40%
Pleasanton, CA: #361 of 3,062 inventorsTop 15%
California: #31,067 of 386,348 inventorsTop 9%
Overall (All Time): #229,345 of 4,157,543Top 6%
19 Patents All Time
Ohwon Kwon has been granted 19 US patents while listed as an inventor at Sandisk Technologies. The first was granted in 2018 and the most recent in July 2025. Ohwon Kwon ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Ohwon Kwon in Pleasanton, CA, US.

Patents per Year

Patents granted per year, 2018 to 2025Bar chart with a peak of 4 patents in 2021.peak 42018: 1 patents20182019: 1 patents20192020: 1 patents20202021: 4 patents20212022: 2 patents20222023: 4 patents20232024: 3 patents20242025: 3 patents2025

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDate
12357754 Thermal flow meter for electric drug injection pump and method for measuring flow using same Dongkyu Lee, Changwon KIM, Kang Ho Lee, Jiae Kim 2025-07-15
12361984 Noise reduction in sense amplifiers for non-volatile memory Iris Lu, Yonggang Wu, Kou Tei 2025-07-15
12243593 Low power read method and a memory device capable thereof Xiang Yang, Deepanshu Dutta, James Kai, Yuki Mizutani 2025-03-04
11978516 Dynamic sense amplifier supply voltage for power and die size reduction Yanjie Wang, Kou Tei, Tai-Yuan Tseng, Yasue Yamamoto, Yonggang Wu +1 more 2024-05-07
11935585 Pseudo multi-plane read methods and apparatus for non-volatile memory devices Xiang Yang, Arka Ganguly 2024-03-19
11881266 Neighbor bit line coupling enhanced gate-induced drain leakage erase for memory apparatus with on-pitch semi-circle drain side select gate technology Xiang Yang, Kou Tei 2024-01-23
11837296 Non-volatile memory with adjusted bit line voltage during verify Yu-Chung Lien, Jiahui Yuan 2023-12-05
11798638 Mitigating neighbor interference to select gates in 3D memory Xiang Yang, Kou Tei 2023-10-24
11699502 Simulating memory cell sensing for testing sensing circuitry Iris Lu, Yan Li 2023-07-11
11651800 Sense amplifier mapping and control scheme for non-volatile memory Feng Lu, Jongyeon Kim 2023-05-16
11521675 Block-dependent cell source bounce impact reduction in non-volatile memory Kou Tei, Anirudh Amarnath 2022-12-06
11222694 Reference current generator control scheme for sense amplifier in NAND design Sirisha Bhamidipati, Arka Ganguly, Chia-Kai Chou, Kou Tei 2022-01-11
11139022 Source line voltage control for NAND memory Kou Tei, Jongyeon Kim, Chia-Kai Chou, Yuedan Li 2021-10-05
11139018 Memory device with temporary kickdown of source voltage before sensing Abu Naser Zainuddin, Jiahui Yuan 2021-10-05
10984877 Multi BLCS for multi-state verify and multi-level QPW Jongyeon Kim, Hiroki Yabe, Kou Tei, Chia-Kai Chou 2021-04-20
10971209 VHSA-VDDSA generator merging scheme Kou Tei, VSNK Chaitanya G 2021-04-06
10839915 Bitline boost for nonvolatile memory Xiang Yang 2020-11-17
10255978 Loop control strobe skew Kenneth Louie, Qui Vi Nguyen, Tai-Yuan Tseng, Jong Hak Yuh 2019-04-09
9959915 Voltage generator to compensate for process corner and temperature variations Amul Desai, Hao Thai Nguyen, Man Lung Mui 2018-05-01