Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11929125 | Window program verify to reduce data latch usage in memory device | Tai-Yuan Tseng, Iris Lu | 2024-03-12 |
| 11901018 | Sense amplifier structure for non-volatile memory with neighbor bit line local data bus data transfer | Iris Lu, Tai-Yuan Tseng | 2024-02-13 |
| 11222694 | Reference current generator control scheme for sense amplifier in NAND design | Sirisha Bhamidipati, Arka Ganguly, Ohwon Kwon, Kou Tei | 2022-01-11 |
| 11139022 | Source line voltage control for NAND memory | Kou Tei, Ohwon Kwon, Jongyeon Kim, Yuedan Li | 2021-10-05 |
| 10984877 | Multi BLCS for multi-state verify and multi-level QPW | Jongyeon Kim, Hiroki Yabe, Kou Tei, Ohwon Kwon | 2021-04-20 |
| 10643695 | Concurrent multi-state program verify for non-volatile memory | Hao Thai Nguyen, Mohan Dunga | 2020-05-05 |