Issued Patents All Time
Showing 25 most recent of 170 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10999401 | Multiple on-die communication networks | Paul N. Loewenstein, Stephen E. Phillips, Thirumalai Swamy Suresh | 2021-05-04 |
| 10679945 | Body-bias voltage routing structures | James B. Burr, Michael Pelham | 2020-06-09 |
| 10110700 | Multiple on-die communication networks | Paul N. Loewenstein, Stephen E. Phillips, Thirumalai Swamy Suresh | 2018-10-23 |
| 9984978 | Body-bias voltage routing structures | James B. Burr, Michael Pelham | 2018-05-29 |
| 9773727 | Multi-layer full dense mesh | Duncan C. Collier, Aparna Ramachandran, King Yen | 2017-09-26 |
| 9632883 | Digital encoding of parallel busses to suppress simultaneous switching output noise | Don Draper, Venkat Krishnaswamy, Paul N. Loewenstein | 2017-04-25 |
| 9595968 | Cross point switch | Scott Pitkethly | 2017-03-14 |
| 9543243 | Low-noise arrangement for very-large-scale integration differential input/output structures | Donald A. Draper, Eben Kunz, Laura Kocubinski | 2017-01-10 |
| 9531361 | Power efficient multiplexer | — | 2016-12-27 |
| 9509317 | Rotational synchronizer circuit for metastablity resolution | Ali Vahidsafa | 2016-11-29 |
| 9484949 | Variable run length encoding of a bit stream | Sadar Ahmed | 2016-11-01 |
| 9406364 | Codec to reduce simultaneously switching outputs | Don Draper, Venkat Krishnaswamy, Paul N. Loewenstein | 2016-08-02 |
| 9406601 | Body-bias voltage routing structures | James B. Burr, Michael Pelham | 2016-08-02 |
| 9218018 | Method and apparatus for distributed generation of multiple configurable ratioed clock domains within a high speed domain | Ali Vahidsafa | 2015-12-22 |
| 9209813 | Coarse data aligner | — | 2015-12-08 |
| 9178505 | Cross point switch | Scott Pitkethly | 2015-11-03 |
| 9178750 | Post-silicon repair of on-die networks | Paul J. Dickinson, Murali M. R. Gala, Karl P. Dahlgren | 2015-11-03 |
| 9160321 | Power efficient multiplexer | — | 2015-10-13 |
| 9136850 | Phase aligner with short lock time | Anand Dixit | 2015-09-15 |
| 9100003 | Systems and methods for adjusting threshold voltage | James B. Burr | 2015-08-04 |
| 9036447 | Decoder circuit with reduced current leakage | Johan Bastiaens | 2015-05-19 |
| 9013943 | Static random access memory circuit with step regulator | — | 2015-04-21 |
| 8994402 | Level shifter circuit optimized for metastability resolution and integrated level shifter and metastability resolution circuit | Changku Hwang, Hoki Kim, Ha Pham | 2015-03-31 |
| 8946905 | Via structure for integrated circuits | — | 2015-02-03 |
| 8943375 | Combo static flop with full test | Ali Vahidsafa | 2015-01-27 |