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Post-silicon repair of on-die networks |
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2015-11-03 |
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Testing multi-core processors |
Murali M. R. Gala, Olivier Caty, Thomas A. Ziaja |
2012-07-03 |
| 8099705 |
Technique for determining circuit interdependencies |
Venkatesh P. Gopinath, Karl P. Dahlgren, Liang Chen |
2012-01-17 |
| 8065572 |
At-speed scan testing of memory arrays |
Thomas A. Ziaja, Murali M. R. Gala, Karl P. Dahlgren, David L. Curwen, Oliver Caty +3 more |
2011-11-22 |
| 7779316 |
Method of testing memory array at operational speed using scan |
Ishwardutt Parulkar, Gaurav Agarwal, Krishna B. Rajan |
2010-08-17 |
| 7679978 |
Scheme for screening weak memory cell |
Hua-Yu Su, Raymond A. Heald, Wen-Jay Hsu, Venkatesh P. Gopinath, Lik T. Cheng +1 more |
2010-03-16 |
| 7009625 |
Method of displaying an image of device test data |
— |
2006-03-07 |
| 6507925 |
Spatial and temporal alignment of a scan dump for debug of scan-based designs |
Sridhar Narayanan, Amitava Majumdar, Gregory S. Clausen, Cary Chin |
2003-01-14 |
