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USPTO Patent Rankings Data through Dec 31, 2025
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Per Hammarlund — 108 Patents

Intel: 89 patents #256 of 30,777Top 1%
Apple: 19 patents #1,739 of 18,612Top 10%
Sunnyvale, CA: #82 of 14,302 inventorsTop 1%
California: #1,955 of 386,348 inventorsTop 1%
Overall (All Time): #12,416 of 4,157,543Top 1%
108 Patents All Time
Per Hammarlund has been granted 108 US patents while listed as an inventor at Intel. The first was granted in 2000 and the most recent in November 2025. Per Hammarlund ranks #12,416 of 4,157,543 US inventors in our database (top 0.30%). Patent records list Per Hammarlund in Sunnyvale, CA, US.

Issued Patents All Time

Showing 1–25 of 108 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12463920 Segment to segment network interface Sergio Kolor, Lior Zimet, Opher Kahn, Eran Tamari, Tzach Zemer 2025-11-04
12399830 Scalable system on a chip Eran Tamari, Lior Zimet, Sergio Kolor, Sergio V. Tota, Sagi Lahav +6 more 2025-08-26
12332792 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2025-06-17
12321681 Full die and partial die tape outs from common design Haim Hauzi, Eran Tamari, Jonathan Redshaw, Alfredo Kostianovsky, Idan Nissel +4 more 2025-06-03
12170478 Merged power delivery Alexander B. Uan-Zo-Li, Shuai Jiang, Jamie L. Langlinais, Hans Lee Yeager, Victor Zyuban +7 more 2024-12-17 $588,520,000
12007895 Scalable system on a chip Eran Tamari, Lior Zimet, Sergio Kolor, Sergio V. Tota, Sagi Lahav +6 more 2024-06-11 $280,845,000
11972140 Hashing with soft memory folding Steven Fishwick, Jeffry E. Gonion, Eran Tamari, Lior Zimet, Gerard R. Williams, III 2024-04-30 $239,224,000
11947457 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2024-04-02 $162,541,000
11941428 Ensuring transactional ordering in I/O agent Sagi Lahav, Lital Levy-Rubin, Gaurav Garg, Gerard R. Williams, III, Samer Nassar +3 more 2024-03-26 $155,925,000
11934313 Scalable system on a chip Lior Zimet, James Vash, Gaurav Garg, Sergio Kolor, Harshavardhan Kaushikkar +2 more 2024-03-19 $131,219,000
11868258 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2024-01-09 $219,732,000
11803471 Scalable system on a chip Lior Zimet, Sergio Kolor, Sagi Lahav, James Vash, Gaurav Garg +11 more 2023-10-31 $267,879,000
11675722 Multiple independent on-chip interconnect Sergio Kolor, Sergio V. Tota, Tzach Zemer, Sagi Lahav, Jonathan Redshaw +8 more 2023-06-13 $237,724,000
11567861 Hashing with soft memory folding Steven Fishwick, Jeffry E. Gonion, Eran Tamari, Lior Zimet, Gerard R. Williams, III 2023-01-31 $251,299,000
11550716 I/O agent Gaurav Garg, Sagi Lahav, Lital Levy-Rubin, Gerard R. Williams, III, Samer Nassar +4 more 2023-01-10 $215,259,000
11544193 Scalable cache coherency protocol James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more 2023-01-03 $247,903,000
11513848 Critical agent identification to modify bandwidth allocation in a virtual channel Liran Fishel, Roman Gindin 2022-11-29 $175,082,000
11467988 Memory fetch granule Liran Fishel, Roman Gindin 2022-10-11 $189,022,000
10877910 Programmable event driven yield mechanism which may activate other threads Hong Wang, Xiang Zou, John Shen, Xinmin Tian, Milind B. Girkar +2 more 2020-12-29 $24,597,000
10795818 Method and apparatus for ensuring real-time snoop latency Harshavardhan Kaushikkar, Brian P. Lilly, Michael Bekerman, James Vash, Manu Gulati +1 more 2020-10-06 $282,421,000
10459858 Programmable event driven yield mechanism which may activate other threads Hong Wang, Xiang Zou, John Shen, Xinmin Tian, Milind B. Girkar +2 more 2019-10-29 $25,165,000
10452403 Mechanism for instruction set based thread execution on a plurality of instruction sequencers Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more 2019-10-22 $16,310,000
10089263 Synchronization of interrupt processing to reduce power consumption Thiam Wah Loh, Gautham Chinya, Reza Fortas, Hong Wang, Huajin Sun 2018-10-02 $23,827,000
9990206 Mechanism for instruction set based thread execution of a plurality of instruction sequencers Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more 2018-06-05 $24,427,000
9910796 Programmable event driven yield mechanism which may activate other threads Hong Wang, Xiang Zou, John Shen, Xinmin Tian, Milind B. Girkar +2 more 2018-03-06 $18,859,000