Issued Patents All Time
Showing 25 most recent of 107 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12399830 | Scalable system on a chip | Eran Tamari, Lior Zimet, Sergio Kolor, Sergio V. Tota, Sagi Lahav +6 more | 2025-08-26 |
| 12332792 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more | 2025-06-17 |
| 12321681 | Full die and partial die tape outs from common design | Haim Hauzi, Eran Tamari, Jonathan Redshaw, Alfredo Kostianovsky, Idan Nissel +4 more | 2025-06-03 |
| 12170478 | Merged power delivery | Alexander B. Uan-Zo-Li, Shuai Jiang, Jamie L. Langlinais, Hans Lee Yeager, Victor Zyuban +7 more | 2024-12-17 |
| 12007895 | Scalable system on a chip | Eran Tamari, Lior Zimet, Sergio Kolor, Sergio V. Tota, Sagi Lahav +6 more | 2024-06-11 |
| 11972140 | Hashing with soft memory folding | Steven Fishwick, Jeffry E. Gonion, Eran Tamari, Lior Zimet, Gerard R. Williams, III | 2024-04-30 |
| 11947457 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more | 2024-04-02 |
| 11941428 | Ensuring transactional ordering in I/O agent | Sagi Lahav, Lital Levy-Rubin, Gaurav Garg, Gerard R. Williams, III, Samer Nassar +3 more | 2024-03-26 |
| 11934313 | Scalable system on a chip | Lior Zimet, James Vash, Gaurav Garg, Sergio Kolor, Harshavardhan Kaushikkar +2 more | 2024-03-19 |
| 11868258 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more | 2024-01-09 |
| 11803471 | Scalable system on a chip | Lior Zimet, Sergio Kolor, Sagi Lahav, James Vash, Gaurav Garg +11 more | 2023-10-31 |
| 11675722 | Multiple independent on-chip interconnect | Sergio Kolor, Sergio V. Tota, Tzach Zemer, Sagi Lahav, Jonathan Redshaw +8 more | 2023-06-13 |
| 11567861 | Hashing with soft memory folding | Steven Fishwick, Jeffry E. Gonion, Eran Tamari, Lior Zimet, Gerard R. Williams, III | 2023-01-31 |
| 11550716 | I/O agent | Gaurav Garg, Sagi Lahav, Lital Levy-Rubin, Gerard R. Williams, III, Samer Nassar +4 more | 2023-01-10 |
| 11544193 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Ramesh Gunna, Steven R. Hutsell +2 more | 2023-01-03 |
| 11513848 | Critical agent identification to modify bandwidth allocation in a virtual channel | Liran Fishel, Roman Gindin | 2022-11-29 |
| 11467988 | Memory fetch granule | Liran Fishel, Roman Gindin | 2022-10-11 |
| 10877910 | Programmable event driven yield mechanism which may activate other threads | Hong Wang, Xiang Zou, John Shen, Xinmin Tian, Milind B. Girkar +2 more | 2020-12-29 |
| 10795818 | Method and apparatus for ensuring real-time snoop latency | Harshavardhan Kaushikkar, Brian P. Lilly, Michael Bekerman, James Vash, Manu Gulati +1 more | 2020-10-06 |
| 10459858 | Programmable event driven yield mechanism which may activate other threads | Hong Wang, Xiang Zou, John Shen, Xinmin Tian, Milind B. Girkar +2 more | 2019-10-29 |
| 10452403 | Mechanism for instruction set based thread execution on a plurality of instruction sequencers | Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more | 2019-10-22 |
| 10089263 | Synchronization of interrupt processing to reduce power consumption | Thiam Wah Loh, Gautham Chinya, Reza Fortas, Hong Wang, Huajin Sun | 2018-10-02 |
| 9990206 | Mechanism for instruction set based thread execution of a plurality of instruction sequencers | Hong Wang, John Shen, Edward T. Grochowski, Richard Hankins, Gautham Chinya +9 more | 2018-06-05 |
| 9910796 | Programmable event driven yield mechanism which may activate other threads | Hong Wang, Xiang Zou, John Shen, Xinmin Tian, Milind B. Girkar +2 more | 2018-03-06 |
| 9785576 | Hardware-assisted virtualization for implementing secure video output path | Thiam Wah Loh, Andreas Wasserbauer, Swee Chong Peter Kuan, Eckhard Delfs, Deepak Abraham Mathaikutty +6 more | 2017-10-10 |