Issued Patents All Time
Showing 25 most recent of 46 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12332792 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Steven R. Hutsell, Lital Levy-Rubin +2 more | 2025-06-17 |
| 11947457 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Steven R. Hutsell, Lital Levy-Rubin +2 more | 2024-04-02 |
| 11934313 | Scalable system on a chip | Per Hammarlund, Lior Zimet, James Vash, Gaurav Garg, Sergio Kolor +2 more | 2024-03-19 |
| 11868258 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Steven R. Hutsell, Lital Levy-Rubin +2 more | 2024-01-09 |
| 11675409 | Power sense correction for power budget estimator | Matthias Knoth, Srikanth Balasubramanian, Venkatram Krishnaswamy | 2023-06-13 |
| 11544193 | Scalable cache coherency protocol | James Vash, Gaurav Garg, Brian P. Lilly, Steven R. Hutsell, Lital Levy-Rubin +2 more | 2023-01-03 |
| 11416056 | Power sense correction for power budget estimator | Matthias Knoth, Srikanth Balasubramanian, Venkatram Krishnaswamy | 2022-08-16 |
| 11347198 | Adaptive thermal control system | Matthias Knoth, Srikanth Balasubramanian | 2022-05-31 |
| 10901484 | Fetch predition circuit for reducing power consumption in a processor | Conrado Blasco, Ronald P. Hall, Ian D. Kountanis, Shyam Sundar, André Seznec | 2021-01-26 |
| 10416692 | Method and apparatus for reducing capacitor-induced noise | Jong-Suk Lee, Shih-Chieh Wen | 2019-09-17 |
| 10410688 | Managing power state in one power domain based on power states in another power domain | Shih-Chieh Wen, Jong-Suk Lee | 2019-09-10 |
| 10401938 | Single power plane dynamic voltage margin recovery for multiple clock domains | Jong-Suk Lee, Shih-Chieh Wen, John H. Mylius | 2019-09-03 |
| 10241557 | Reducing power consumption in a processor | Conrado Blasco, Ronald P. Hall, Ian D. Kountanis, Shyam Sundar, André Seznec | 2019-03-26 |
| 10147464 | Managing power state in one power domain based on power states in another power domain | Shih-Chieh Wen, Jong-Suk Lee | 2018-12-04 |
| 9626185 | IT instruction pre-decode | Shyam Sundar, Ian D. Kountanis, Conrado Blasco-Allue, Gerard R. Williams, III, Wei-Han Lien | 2017-04-18 |
| 9405544 | Next fetch predictor return address stack | Douglas C. Holman, Conrado Blasco-Allue | 2016-08-02 |
| 9367471 | Fetch width predictor | Conrado Blasco-Allue | 2016-06-14 |
| 9354886 | Maintaining the integrity of an execution return address stack | Peter J. Bannon, Andrew J. Beaumont-Smith | 2016-05-31 |
| 9280352 | Lookahead scanning and cracking of microcode instructions in a dispatch queue | Peter J. Bannon, Rajat Goel | 2016-03-08 |
| 8959320 | Preventing update training of first predictor with mismatching second predictor for branch instructions with alternating pattern hysteresis | Andrew J. Beaumont-Smith | 2015-02-17 |
| 8892841 | Store handling in a processor | Po-Yung Chang, Sudarshan Kadambi | 2014-11-18 |
| 8566528 | Combining write buffer with dynamically adjustable flush metrics | Peter J. Bannon, Andrew J. Beaumont-Smith, Wei-Han Lien, Brian P. Lilly, Jaidev P. Patwardhan +2 more | 2013-10-22 |
| 8555040 | Indirect branch target predictor that prevents speculation if mispredict is expected | Andrew J. Beaumont-Smith | 2013-10-08 |
| 8364907 | Converting victim writeback to a fill | Sudarshan Kadambi | 2013-01-29 |
| 8359414 | Retry mechanism | James B. Keller, Sridhar Subramanian | 2013-01-22 |