| 10776022 |
Combined transparent/non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2020-09-15 |
$162,043,000 |
| 10241705 |
Combined transparent/non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2019-03-26 |
$123,032,000 |
| 9575754 |
Zero cycle move |
John H. Mylius, Conrado Blasco-Allue, Gerard R. Williams, III, Suparn Vats |
2017-02-21 |
$62,812,000 |
| 9529544 |
Combined transparent/non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2016-12-27 |
$55,003,000 |
| 9430243 |
Optimizing register initialization operations |
John H. Mylius, Conrado Blasco-Allue, Gerard R. Williams, III |
2016-08-30 |
$60,171,000 |
| 9317285 |
Instruction set architecture mode dependent sub-size access of register with associated status indication |
Sandeep Gupta, Conrado Blasco-Allue, John H. Mylius, Gerard R. Williams, III |
2016-04-19 |
$45,541,000 |
| 9274953 |
Combined transparent/non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2016-03-01 |
$57,077,000 |
| 9223577 |
Processing multi-destination instruction in pipeline by splitting for single destination operations stage and merging for opcode execution operations stage |
John H. Mylius, Gerard R. Williams, III, Fang Liu, Shyam Sundar |
2015-12-29 |
$60,508,000 |
| 9201658 |
Branch predictor for wide issue, arbitrarily aligned fetch that can cross cache line boundaries |
Ian D. Kountanis, Gerard R. Williams, III |
2015-12-01 |
$65,309,000 |
| 8977818 |
Combined transparent/non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2015-03-10 |
$87,927,000 |
| 8848577 |
Bandwidth management |
Gurjeet S. Saund, Manu Gulati, Sukalpa Biswas |
2014-09-30 |
$91,732,000 |
| 8775757 |
Trust zone support in system on a chip having security enclave processor |
R. Stephen Polzin, Gerard R. Williams, III |
2014-07-08 |
$79,304,000 |
| 8744602 |
Fabric limiter circuits |
Gurjeet S. Saund, Michael Frank |
2014-06-03 |
$58,287,000 |
| 8719509 |
Cache implementing multiple replacement policies |
James Wang, Zongjian Chen, Timothy J. Millet |
2014-05-06 |
$51,563,000 |
| 8611127 |
Stacked memory device having a scalable bandwidth interface |
Patrick Law, R. Stephen Polzin |
2013-12-17 |
$66,897,000 |
| 8566526 |
Combined transparent/non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2013-10-22 |
$104,740,000 |
| 8493863 |
Hierarchical fabric control circuits |
Gurjeet S. Saund, Michael Frank |
2013-07-23 |
$65,903,000 |
| 8392658 |
Cache implementing multiple replacement policies |
James Wang, Zongjian Chen, Timothy J. Millet |
2013-03-05 |
$73,541,000 |
| 8359414 |
Retry mechanism |
Sridhar Subramanian, Ramesh Gunna |
2013-01-22 |
$96,014,000 |
| 8301941 |
Memory controller with loopback test interface |
Luka Bodrozic, Sukalpa Biswas, Hao Chen, Sridhar Subramanian |
2012-10-30 |
|
| 8255670 |
Replay reduction for power saving |
Po-Yung Chang, Wei-Han Lien, Jesse Pan, Ramesh Gunna, Tse-Yu Yeh |
2012-08-28 |
$72,244,000 |
| 8244981 |
Combined transparent/non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2012-08-14 |
$121,602,000 |
| 8219758 |
Block-based non-transparent cache |
James Wang, Zongjian Chen, Timothy J. Millet |
2012-07-10 |
$155,116,000 |
| 8218347 |
Stacked memory device having a scalable bandwidth interface |
Patrick Law, R. Stephen Polzin |
2012-07-10 |
$155,116,000 |
| 8171326 |
L1 flush mechanism to flush cache for power down and handle coherence during flush and/or after power down |
Tse-Yu Yeh, Ramesh Gunna, Brian J. Campbell |
2012-05-01 |
$99,110,000 |
