Issued Patents All Time
Showing 25 most recent of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10776022 | Combined transparent/non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2020-09-15 |
| 10241705 | Combined transparent/non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2019-03-26 |
| 9529544 | Combined transparent/non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2016-12-27 |
| 9274953 | Combined transparent/non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2016-03-01 |
| 8977818 | Combined transparent/non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2015-03-10 |
| 8806247 | Adaptive power control | Sameer Halepete, H. Peter Anvin, Godfrey P. D'Souza, Marc Fleischmann, Keith Klayman +2 more | 2014-08-12 |
| 8719509 | Cache implementing multiple replacement policies | James Wang, James B. Keller, Timothy J. Millet | 2014-05-06 |
| 8566627 | Adaptive power control | Sameer Halepete, H. Peter Anvin, Godfrey P. D'Souza, Marc Fleischmann, Keith Klayman +2 more | 2013-10-22 |
| 8566485 | Data transformation during direct memory access | Dominic Go, Mark D. Hayter, Ruchi Wadhawan | 2013-10-22 |
| 8566526 | Combined transparent/non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2013-10-22 |
| 8417844 | DMA controller which performs DMA assist for one peripheral interface controller and DMA operation for another peripheral interface controller | Dominic Go, Mark D. Hayter, Ruchi Wadhawan | 2013-04-09 |
| 8400924 | Credit management when resource granularity is larger than credit granularity | James Wang | 2013-03-19 |
| 8397049 | TLB prefetching | James Wang | 2013-03-12 |
| 8392658 | Cache implementing multiple replacement policies | James Wang, James B. Keller, Timothy J. Millet | 2013-03-05 |
| 8244981 | Combined transparent/non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2012-08-14 |
| 8219758 | Block-based non-transparent cache | James Wang, James B. Keller, Timothy J. Millet | 2012-07-10 |
| 8209446 | DMA controller that passes destination pointers from transmit logic through a loopback buffer to receive logic to write data to memory | Dominic Go, Mark D. Hayter, Ruchi Wadhawan | 2012-06-26 |
| 8169764 | Temperature compensation in integrated circuit | Toshinari Takayanagi, Conrad H. Ziesler, Vincent R. von Kaenel | 2012-05-01 |
| 8078772 | Digital phase relationship lock loop | James Wang, James B. Keller | 2011-12-13 |
| 8045472 | Credit management when resource granularity is larger than credit granularity | James Wang | 2011-10-25 |
| 8032670 | Method and apparatus for generating DMA transfers to memory | Dominic Go, Mark D. Hayter, Ruchi Wadhawan | 2011-10-04 |
| 8028103 | Method and apparatus for generating secure DAM transfers | Dominic Go, Mark D. Hayter, Weichun Ku | 2011-09-27 |
| 7873762 | Digital phase relationship lock loop | James Wang, James B. Keller | 2011-01-18 |
| 7804721 | Enqueue event first-in, first-out buffer (FIFO) | James Wang | 2010-09-28 |
| 7680963 | DMA controller configured to process control descriptors and transfer descriptors | Dominic Go, Mark D. Hayter, Ruchi Wadhawan | 2010-03-16 |