Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12235703 | Dynamic voltage margin recovery | John H. Mylius, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar | 2025-02-25 |
| 11740676 | Dynamic voltage margin recovery | John H. Mylius, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar | 2023-08-29 |
| 11422606 | Dynamic voltage margin recovery | John H. Mylius, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar | 2022-08-23 |
| 10955893 | Dynamic voltage margin recovery | John H. Mylius, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar | 2021-03-23 |
| 10101788 | Dynamic voltage margin recovery | John H. Mylius, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar | 2018-10-16 |
| 10054618 | Integrated characterization circuit | Matthias Knoth, Toshinari Takayanagi | 2018-08-21 |
| 9606605 | Dynamic voltage margin recovery | John H. Mylius, Daniel C. Murray, Jong-Suk Lee, Rohit Kumar | 2017-03-28 |
| 9277223 | Eliminating plaintext video from external memory | — | 2016-03-01 |
| 8977881 | Controller core time base synchronization | Herbert Lopez-Aguado, Jung Wook Cho | 2015-03-10 |
| 8769332 | Regional clock gating and dithering | John H. Mylius, Jason M. Kassoff | 2014-07-01 |
| 8713370 | Non-intrusive processor tracing | Timothy J. Millet, Shun Wai Go | 2014-04-29 |
| 8571216 | Eliminating plaintext video from external memory | — | 2013-10-29 |
| 8553488 | Performing stuck-at testing using multiple isolation circuits | Brian J. Campbell, Daniel C. Murray | 2013-10-08 |
| 8421499 | Power switch ramp rate control using programmable connection to switches | Toshinari Takayanagi, Shingo Suzuki, Jung-Cheng Yeh | 2013-04-16 |
| 8362805 | Power switch ramp rate control using daisy-chained flops | Shingo Suzuki, Vincent R. von Kaenel, Toshinari Takayanagi, Daniel C. Murray | 2013-01-29 |
| 8289063 | Clock distribution network architecture with clock skew management | Juang-Ying Chueh, Jerry Chang Jui Kao, Visvesh S. Sathe, Marios C. Papaefthymiou | 2012-10-16 |
| 8169764 | Temperature compensation in integrated circuit | Toshinari Takayanagi, Zongjian Chen, Vincent R. von Kaenel | 2012-05-01 |
| 7956664 | Clock distribution network architecture with clock skew management | Juang-Ying Chueh, Jerry Chang Jui Kao, Visvesh S. Sathe, Marios C. Papaefthymiou | 2011-06-07 |
| 7782988 | Digital frequency synthesizer | — | 2010-08-24 |
| 7622977 | Ramped clock digital storage control | Marios C. Papaefthymiou | 2009-11-24 |
| 7355454 | Energy recovery boost logic | Marios C. Papaefthymiou, Visvesh S. Sathe | 2008-04-08 |
| 6777992 | Low-power CMOS flip-flop | Marios C. Papaefthymiou | 2004-08-17 |
| 6742132 | Method and apparatus for generating a clock signal having a driven oscillator circuit formed with energy storage characteristics of a memory storage device | Marios C. Papaefthymiou | 2004-05-25 |