Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11277141 | Dual feedback loops for integrated voltage and clock regulation | Xun Sun | 2022-03-15 |
| 10938397 | Recording channels for biopotential signals | William Anthony Smith | 2021-03-02 |
| 8975936 | Constraining clock skew in a resonant clocked system | Samuel D. Naffziger | 2015-03-10 |
| 8941432 | Transitioning between resonant clocking mode and conventional clocking mode | Srikanth Arekapudi, Charles Ouyang, Kyle S. Viau | 2015-01-27 |
| 8854100 | Clock driver for frequency-scalable systems | Samuel D. Naffziger, Srikanth Arekapudi | 2014-10-07 |
| 8836403 | Programmable clock driver | Srikanth Arekapudi, Samuel D. Naffziger, Manivannan Bhoopathy | 2014-09-16 |
| 8742817 | Controlling impedance of a switch using high impedance voltage sources to provide more efficient clocking | Samuel D. Naffziger | 2014-06-03 |
| 8710868 | Sense-amplifier monotizer | Samuel D. Naffziger, Srikanth Arekapudi | 2014-04-29 |
| 8373512 | Oscillator device and methods thereof | — | 2013-02-12 |
| 8289063 | Clock distribution network architecture with clock skew management | Juang-Ying Chueh, Jerry Chang Jui Kao, Marios C. Papaefthymiou, Conrad H. Ziesler | 2012-10-16 |
| 8193799 | Interposer including voltage regulator and method therefor | Stephen V. Kosonocky, Samuel D. Naffziger | 2012-06-05 |
| 7956664 | Clock distribution network architecture with clock skew management | Juang-Ying Chueh, Jerry Chang Jui Kao, Marios C. Papaefthymiou, Conrad H. Ziesler | 2011-06-07 |
| 7719316 | Clock distribution network architecture for resonant-clocked systems | Juang-Ying Chueh, Jerry Chang Jui Kao, Marios C. Papaefthymiou | 2010-05-18 |
| 7719317 | Clock distribution network architecture with resonant clock gating | Juang-Ying Chueh, Jerry Chang Jui Kao, Marios C. Papaefthymiou | 2010-05-18 |
| 7355454 | Energy recovery boost logic | Marios C. Papaefthymiou, Conrad H. Ziesler | 2008-04-08 |